Datasheet

MAX17103/AUO-P1721.14
DC-DC Converter with Integrated Scan Driver,
VGL Controller, Op Amp, and LDO for TFT LCD
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Pin Description (continued)
PIN NAME FUNCTION
21 VDET Voltage Detector Input
22 SS Step-Up Regulator Soft-Start Control
23 COMP
Compensation Pin for Error Amplifier. Connect a series RC from this pin to AGND. Typical values
are 56k and 1000pF.
24 FB
Step-Up Regulator Feedback Pin. Reference voltage is 1.24V nominal. Connect an external
resistor-divider midpoint to FB and minimize trace area. Set V
MAIN
according to V
MAIN
= 1.24V
(1 + R1/R2).
25 PGND Power Ground. Source connection of the internal step-up regulator power switch.
26 LX Switching Node. Connect inductor/catch diode here and minimize trace area for lowest EMI.
27 ENA
Chip-Enable Control and Overcurrent Protection (OCP) Set Input. When ENA = low, the step-up
converter and op amp are disabled, but the LDO remains active and the level-shifter outputs are
high impedance.
28 IN
Step-Up Regulator and Low-Dropout Regulator Supply Pin. Bypass IN to AGND with a 1μF or greater
ceramic capacitor.
29 LDOO Internal Linear Regulator Output. Bypass LDOO to AGND with a 1μF capacitor.
30 LDOADJ Linear Regulator Feedback Input. Reference voltage is 1.24V nominal.
31 AGND Analog Ground
32 OUT Operational Amplifier Output
— EP Exposed Backside Pad. Connected to AGND.