Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsPMICsPMIC - DC/DC voltage regulator Boost TQFN 48 EP

MAX17094

Internal-Switch Boost Regulator with Integrated

7-Channel Driver, VCOM Calibrator, Op Amp, and LDO

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

PCB Layout and Grounding

Careful PCB layout is important for proper operation.

Use the following guidelines for good PCB layout:

• Minimize the area of high-current loops by placing

the inductor, output diode, and output capacitors

near the input capacitors and near the LX and

PGND pins. The high-current input loop goes from

the positive terminal of the input capacitor to the

inductor, to the IC’s LX pin, out of PGND, and to the

input capacitor’s negative terminal. The high-cur-

rent output loop is from the positive terminal of the

input capacitor to the inductor, to the output diode

(D1), to the positive terminal of the output capaci-

tors, reconnecting between the output capacitor

and input capacitor ground terminals. Connect

these loop components with short, wide connec-

tions. Avoid using vias in the high-current paths. If

vias are unavoidable, use many vias in parallel to

reduce resistance and inductance.

• Create a power ground island (PGND) consisting of

the input and output capacitor grounds, PGND pin,

and any charge-pump components. Connect all

these together with short, wide traces or a small

ground plane. Maximizing the width of the power

ground traces improves efficiency and reduces out-

put-voltage ripple and noise spikes. Create an analog

ground plane (AGND) consisting of the AGND pin, all

the feedback-divider ground connections, the opera-

tional-amplifier-divider ground connections, the

COMP capacitor ground connection, the AVDD

capacitor ground connection, and the device’s

exposed backside pad. Create a ground plane

(BGND) to carry operational amplifier return current

with the AVDO bypass capacitor connected to this

ground plane. Connect the AGND, BGND, and PGND

islands by connecting the PGND and BGND pins

directly to the exposed backside pad. Make no other

connections between these separate ground planes.

• Place the feedback-voltage-divider resistors as

close to the feedback pin as possible. The divider’s

center trace should be kept short. Placing the resis-

tors far away causes the FB trace to become an

antenna that can pick up switching noise. Care

should be taken to avoid running the feedback

trace near LX or the switching nodes in the charge

pumps.

• Place IN pin bypass capacitors as close to the

device as possible. The ground connections of the

IN bypass capacitor should be connected directly

to the AGND pin with a wide trace.

• Minimize the length and maximize the width of the

traces between the output capacitors and the load

for best transient responses.

• Minimize the size of the LX node while keeping it

wide and short. Keep the LX node away from the

feedback node and analog ground. Use DC traces

as shields, if necessary.

Refer to the MAX17094 evaluation kit for an example of

proper board layout.

Package Information

For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.

PACKAGE TYPE PACKAGE CODE DOCUMENT NO.

48 TQFN T4866N+1

21-0141