Datasheet

MAX16993 Step-Down Controller with
Dual 2.1MHz Step-Down DC-DC Converters
www.maximintegrated.com
Maxim Integrated │ 17
Table 1. Inductor Values vs. (V
SUPMAX,
V
OUT1
)
the following formulas to determine the minimum inductor
value:
( )
OUT 1
SUPMAX OUT 1
SUPMAX
MIN 1
SW 1 OUTMAX INDMAX
V
VV
V
L [ H ] 1.3
1
fI K


−×





= ×



×



××


where f
SW1
is the operating frequency and 1.3 is a
coefficient that accounts for inductance initial precision.
or
OUT1
MIN 2 CS
6
V_CS
SW1
V
L [ H ] 1.3 R
0.8
2.1 10
A
f
µ= × ×
×
××
where A
V_CS
is current-sense amplifier gain (8V/V, typ).
For proper operation, the chosen inductor value must be
greater than or equal to L
MIN1
and L
MIN2
. The maximum
inductor value recommended is twice the chosen value
from the above formulas.
Table 1 lists some of the inductor values for 5A output
current and several switching frequencies and output
voltages.
Buck 1 Input Capacitor
The device is designed to operate with a single 0.1µF
capacitor on the V
SUP
input and a single 0.1µF capacitor
on the PV1 input. Place these capacitors as close as pos-
sible to their corresponding inputs to ensure the best EMI
and jitter performance.
OUT1 Output Capacitor
The primary purpose of the OUT1 output capacitor is to
reduce the change in V
OUT1
during load transient condi-
tions. The minimum capacitor depends on the output volt-
age, maximum current, and load regulation accuracy. Use
the following formula to determine the minimum output
capacitor for Buck 1:
OUT1(MAX)
OUT
OUT1
CO OUT1
OUT1
I
C
V
2f V
V
≥
∆
π× × ×
where f
CO
is the crossover frequency set by R
C
and C
C
,
andΔV
OUT1
is the allowable change in voltage during a
load transient condition.
For proper functionality, ceramic capacitors must be used.
Make sure that the self-resonance of the ceramic capaci-
tors is above 1MHz to avoid instability.
Buck 1 MOSFET Selection
Buck 1 drives two external logic-level n-channel MOSFETs
as the circuit switch elements. The key selection param-
eters to choose these MOSFETs are:
● On-resistance (R
DS(ON)
)
● Maximum drain-to-source voltage (V
DS(MAX)
)
● Minimum threshold voltage (V
TH(MIN)
)
● Total gate charge (Q
G
)
● Reverse transfer capacitance (C
RSS
)
● Power dissipation
Both n-channel MOSFETs must be logic-level types with
guaranteed on-resistance specifications at V
GS
= 4.5V
when V
OUT1
is set to 5V or V
GS
= 3V when V
OUT1
is set
to 3.3V. The conduction losses at minimum input voltage
should not exceed MOSFET package thermal limits or
violate the overall thermal budget. Also, ensure that the
conduction losses plus switching losses at the maximum
input voltage do not exceed package ratings or violate the
overall thermal budget. In particular, check that the dV/dt
caused by DH1 turning on does not pull up the DL1 gate
through its drain-to-gate capacitance. This is the most
frequent cause of cross-conduction problems.
V
SUPMAX
to V
OUT1
(V) V
SUPMAX
= 36V, V
OUT1
= 5V V
SUPMAX
= 36V, V
OUT1
= 3.3V
f
SW1
(MHz) 2.1 1.05 0.525 0.420 0.350 2.1 1.05 0.525 0.420 0.350
INDUCTOR (µH), I
LOAD
= 5A 1.5 3.3 5.6 6.8 8.2 1.0 2.2 4.7 4.7 6.8