Datasheet

High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
______________________________________________________________________________________ 17
The total loop gain as the product of the modulator gain,
the feedback voltage-divider gain, and the error amplifier
gain at f
C
should be equal to 1. So:
FB
MOD(fC) EA(fC)
OUT
V
GAIN GAIN 1
V
× × =
For the case where f
zMOD
is greater than f
C
:
EA(fC) m,EA C
GAIN g R= ×
pMOD
MOD(fC) MOD(DC)
C
f
GAIN GAIN
f
= ×
Therefore:
FB
MOD(fC) m,EA C
OUT
V
GAIN g R 1
V
× × × =
Solving for R
C
:
OUT
C
m,EA FB MOD(fC)
V
R
g V GAIN
=
× ×
Set the error-amplifier compensation zero formed by R
C
and C
C
(f
zEA
) at the f
pMOD
. Calculate the value of C
C
as follows:
C
pMOD C
1
C
2 f R
=
π × ×
If f
zMOD
is less than 5 x f
C
, add a second capacitor,
C
F
, from COMP to GND and set the compensation pole
formed by R
C
and C
F
(f
pEA
) at the f
zMOD
. Calculate the
value of C
F
as follows:
F
zMOD C
1
C
2 f R
=
π × ×
As the load current decreases, the modulator pole also
decreases; however, the modulator gain increases
accordingly and the crossover frequency remains the
same.
For the case where f
zMOD
is less than f
C
:
The power-modulator gain at f
C
is:
pMOD
MOD(fC) MOD(DC)
zMOD
f
GAIN GAIN
f
= ×
The error-amplifier gain at f
C
is:
zMOD
EA(fC) m,EA C
C
f
GAIN g R
f
= × ×
Therefore:
zMOD
FB
MOD(fC) m,EA C
OUT C
f
V
GAIN g R 1
V f
× × × × =
Solving for R
C
:
OUT C
C
m,EA FB MOD(fC) zMOD
V f
R
g V GAIN f
×
=
× × ×
Set the error-amplifier compensation zero formed by R
C
and C
C
at the f
pMOD
(f
zEA
= f
pMOD
):
C
pMOD C
1
C
2 f R
=
π × ×
If f
zMOD
is less than 5 O f
C
, add a second capacitor, C
F
,
from COMP to GND. Set f
pEA
= f
zMOD
and calculate C
F
as follows:
F
zMOD C
1
C
2 f R
=
π × ×
PCB Layout Guidelines
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer
board whenever possible for better noise immunity and
power dissipation. Follow these guidelines for good PCB
layout:
1) Use a large contiguous copper plane under the IC
package. Ensure that all heat-dissipating compo-
nents have adequate cooling. The bottom pad of the
device must be soldered down to this copper plane
for effective heat dissipation and getting the full
power out of the IC. Use multiple vias or a single large
via in this plane for heat dissipation.
2) Isolate the power components and high-current path
from the sensitive analog circuitry. This is essential to
prevent any noise coupling into the analog signals.
3) Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation. The high-current path composed
of input capacitor, high-side FET, inductor, and the
output capacitor should be as short as possible.