Datasheet

High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
MAX16974
______________________________________________________________________________________ 13
Assume a full 100mA is needed to refresh the BST
capacitor. Depending on the size of the inductor, the time
it takes to build up a full 100mA in the inductor is given by:
dt (inductor) = L x di/dV (current buildup starts from the
6th clock cycle)
L = inductor value chosen in the design guide
di is the required current = 100mA
dV = voltage across the inductor (assume this to be
0.5V), which means V
IN
is greater than V
OUT
by 0.5V
If dt (inductor) < 7.65 - 6 (clock cycles), the BST capaci-
tor should be sized as follows:
BST_CAP ≥ I
BST(DROPOUT)
x dt (no load)/dV
(BST capacitor)
dt (no load) = 7.65 clock cycles = 34.77µs
dV (BST capacitor) for (3.3V to 5V) output = V
OUT
- 2.7V
(2.7V is the minimum voltage allowed on the bst capacitor)
If dt (inductor) > 7.65 - 6 clock cycles, then wait for the
next count of 3.65 clock cycles making dt (no load) =
11.65 clock cycles.
Considering the typical inductor values used for 220kHz
operation, the safe way to design the BST capacitor is
to assume:
dt (no load) as 16 clock cycles
So the final BST_CAPACITOR equation is:
BST_CAP = I
BST(DROPOUT)
x dt (no load)/dV (BST
capacitor)
where
I
BST(DROPOUT)
= 3mA (worst case)
dt (no load) = 16 clock cycles
dV (BST capacitor) = V
OUT
- 2.7V.
Reset Timeout Period
The device offers a capacitor-adjustable reset timeout
period. Connect up to 0.1FF capacitor from CRES to
GND to set the timeout period. CRES can source 10FA
of current. Use the following formula to set the timeout
period:
-6
1.25V C
RESET_TIMEOUT (s),
10 10 A
×
=
×
where C is the capacitor from CRES to GND in Farads.
Internal Oscillator
The switching frequency, f
SW
, is set by a resistor
(R
FOSC
) connected from FOSC to GND. See Figure 4 to
select the correct R
FOSC
value for the desired switching
frequency.
For example, a 2.2MHz switching frequency is set with
R
FOSC
= 12.1kI. Higher frequencies allow designs
with lower inductor values and less output capacitance.
Consequently, peak currents and I
2
R losses are lower
at higher switching frequencies, but core losses, gate-
charge currents, and switching losses increase.
Inductor Selection
Three key inductor parameters must be specified for
operation with the device: inductance value (L), inductor
saturation current (I
SAT
), and DC resistance (R
DCR
). To
select inductance value, the ratio of inductor peak-to-
peak AC current to DC average current (LIR) must be
selected first. A good compromise between size and
loss is a 30% peak-to-peak ripple current to average
current ratio (LIR = 0.3). The switching frequency, input
voltage, output voltage, and selected LIR determine the
inductor value as follows:
OUT SUP OUT
SUP SW OUT
V (V V )
L
V f I LIR
=
where V
SUP
, V
OUT
, and I
OUT
are typical values so that
efficiency is optimum for typical conditions. The switch-
ing frequency is set by R
FOSC
(see the Internal Oscillator
section). The exact inductor value is not critical and can
be adjusted to make trade-offs among size, cost, effi-
ciency, and transient response requirements.
Figure 4. Switching Frequency vs. R
FOSC
SWITCHING FREQUENCY vs. R
FOSC
MAX16974 toc12
R
FOSC
(kI)
SWITCHING FREQUENCY (MHz)
12211222 32 42 62 72 82 9252 102
0.4
0.8
1.2
1.6
2.0
2.4
2.8
0
12