Datasheet

MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
21
Maxim Integrated
If f
zMOD
is less than 5 x f
C
, add a second capacitor,
C
F
, from COMP to SGND and set the compensation
pole formed by R
C
and C
F
(f
pEA
) at the f
zMOD
.
Calculate the value of C
F
as follows:
As the load current decreases, the modulator pole also
decreases; however, the modulator gain increases
accordingly and the crossover frequency remains the
same.
For the case where f
zMOD
is less than f
C
:
The power-modulator gain at f
C
is:
The error-amplifier gain at f
C
is:
Therefore:
Solving for R
C
:
Set the error-amplifier compensation zero formed by R
C
and C
C
at the f
pMOD
(f
zEA
= f
pMOD
):
If f
zMOD
is less than 5 × f
C
, add a second capacitor C
F
from COMP to SGND. Set f
pEA
= f
zMOD
and calculate
C
F
as follows:
MOSFET Selection
The MAX16955’s controller drives two external logic-
level n-channel MOSFETs as the circuit switch ele-
ments. The key selection parameters to choose these
MOSFETs include:
• On-resistance (R
DS(ON)
)
• Maximum drain-to-source voltage (V
DS(MAX)
)
• Minimum threshold voltage (V
TH(MIN)
)
• Total gate charge (Q
G
)
• Reverse-transfer capacitance (C
RSS
)
• Power dissipation
Both n-channel MOSFETs must be logic-level types
with guaranteed on-resistance specifications at V
GS
=
4.5V. Ensure that the conduction losses at minimum
input voltage do not exceed MOSFET package thermal
limits or violate the overall thermal budget. Also, ensure
that the conduction losses, plus switching losses at the
maximum input voltage, do not exceed package ratings
or violate the overall thermal budget. The MAX16955’s
DL gate driver must drive the low-side MOSFET (NL). In
particular, check that the dV/dt caused by the high-side
MOSFET (NH) turning on does not pull up the NL gate
through its drain-to-gate capacitance. This is the most
frequent cause of cross-conduction problems.
Gate-charge losses are dissipated by the driver and do
not heat the MOSFET. Therefore, if the drive current is
taken from the internal LDO regulator, the power dissi-
pation due to drive losses must be checked. Both
MOSFETs must be selected so that their total gate
charge is low enough; therefore, BIAS can power both
drivers without overheating the IC:
P
DRIVE
= (V
SUP
- V
BIAS
) × Q
G_TOTAL
× f
SW
where Q
G_TOTAL
is the sum of the gate charges of both
MOSFETs.
Boost-Flying Capacitor Selection
The bootstrap capacitor stores the gate voltage for the
internal switch. Its size is constrained by the switching
frequency and the gate charge of the high-side
MOSFET. Ideally the bootstrap capacitance should be
at least nine times the gate capacitance:
This results in a 10% voltage drop when the gate is
driven. However, if this value becomes too large to be
recharged during the minimum off-time, a smaller
capacitor must be chosen.
C
Q
V
BST TYP
G
BIAS
()
=×9
C
Rf
F
CzMOD
=
××
1
2π
C
fR
C
MOD C
=
××
1
2
2
π
R
Vf
g V GAIN f
C
OUT C
mEA FB
MOD fC
zMOD
=
×
×× ×
()
,
GAIN
V
V
gR
f
f
MOD fC
FB
OUT
mEA C
zMOD
C
()
×××× =
,
1
GAIN g R
f
f
EA fC
mEA C
zMOD
C
()
=××
,
GAIN GAIN
f
f
MOD fC MOD dc
pMOD
zMOD
() ()
=×
C
fR
F
zMOD C
=
××
1
2π