Datasheet
MAX16936
36V, 220kHz to 2.2MHz Step-Down Converter
with 28µA Quiescent Current
15Maxim Integrated
As the load current decreases, the modulator pole
also decreases; however, the modulator gain increases
accordingly and the crossover frequency remains the
same.
PCB Layout Guidelines
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer board
whenever possible for better noise immunity and power
dissipation. Follow these guidelines for good PCB layout:
1) Use a large contiguous copper plane under the IC
package. Ensure that all heat-dissipating components
have adequate cooling. The bottom pad of the IC
must be soldered down to this copper plane for effec-
tive heat dissipation and for getting the full power out
of the IC. Use multiple vias or a single large via in this
plane for heat dissipation.
2) Isolate the power components and high current path
from the sensitive analog circuitry. Doing so is essential
to prevent any noise coupling into the analog signals.
Implementing an RC filter on the SUP pin decreases
switching noise from entering the logic supply. Refer
to the MAX16936 EV kit data sheet for details on filter
configuration and PCB layout for the SUP and SUPSW
input capacitors. Do not route the OUT or feedback
signal next to the inductor. Make sure components
used on FOSC, COMP, and BIAS are connected to
analog ground.
3) Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation. The high-current path composed
of the input capacitor, high-side FET, inductor, and
the output capacitor should be as short as possible.
4) Keep the power traces and load connections short. This
practice is essential for high efficiency. Use thick cop-
per PCBs (2oz vs. 1oz) to enhance full-load efficiency.
5) The analog signal lines should be routed away from
the high-frequency planes. Doing so ensures integrity
of sensitive signals feeding back into the IC.
6) The ground connection for the analog and power sec-
tion should be close to the IC. This keeps the ground
current loops to a minimum. In cases where only one
ground is used, enough isolation between analog return
signals and high power signals must be maintained.
Typical Application Circuit
D1
C
OUT
22µF
C
IN2
4.7µF
C
IN3
4.7µF
R
IN3
0I
R
COMP
20kI
R
PGOOD
10kI
R
SYNCOUT
100I
R
FOSC
12kI
L1
2.2µH
V
OUT
5V AT 2.5A
C
BST
0.1µF
LX
BST
V
OUT
V
BIAS
OUT
V
BAT
FB
V
BIAS
V
OUT
PGOOD
SYNCOUT
FOSC
C
BIAS
1µF
C
COMP2
12pF
BIAS
C
COMP1
1000pF
COMP
FSYNC
OSC SYNC PULSE
EN
SUPSWSUP
C
IN1
POWER-GOOD OUTPUT
180° OUT-OF-PHASE OUTPUT
AGNDPGND
MAX16936