Datasheet

MAX16936
36V, 220kHz to 2.2MHz Step-Down Converter
with 28µA Quiescent Current
11Maxim Integrated
FPWM operation. Connecting FSYNC to AGND enables
skip mode operation.
The external clock frequency at FSYNC can be higher
or lower than the internal clock by 20%. Ensure the duty
cycle of the external clock used has a minimum pulse
width of 100ns. The device synchronizes to the external
clock within one cycle. When the external clock signal
at FSYNC is absent for more than two clock cycles, the
device reverts back to the internal clock.
System Enable (EN)
An enable control input (EN) activates the device from its
low-power shutdown mode. EN is compatible with inputs
from automotive battery level down to 3.5V. The high volt-
age compatibility allows EN to be connected to SUP, KEY/
KL30, or the inhibit pin (INH) of a CAN transceiver.
EN turns on the internal regulator. Once V
BIAS
is above the
internal lockout threshold, V
UVL
= 3.15V (typ), the control-
ler activates and the output voltage ramps up within 8ms.
A logic-low at EN shuts down the device. During shut-
down, the internal linear regulator and gate drivers turn
off. Shutdown is the lowest power state and reduces the
quiescent current to 5FA (typ). Drive EN high to bring the
device out of shutdown.
Spread-Spectrum Option
The MAX16936 has an internal spread-spectrum option
to optimize EMI performance. This is factory set and the
S-version of the IC should be ordered. For spread-spec-
trum-enabled ICs, the operating frequency is varied ±6%
centered on FOSC. The modulation signal is a triangular
wave with a period of 110μs at 2.2MHz. Therefore, FOSC will
ramp down 6% and back to 2.2MHz in 110μs and also ramp
up 6% and back to 2.2MHz in 110μs. The cycle repeats.
For operations at FOSC values other than 2.2MHz, the modu-
lation signal scales proportionally, e.g., at 400kHz, the 110μs
modulation period increases to 110μs x 2.2MHz/400kHz =
605μs.
The internal spread spectrum is disabled if the IC is synced
to an external clock. However, the IC does not filter the
input clock and passes any modulation (including spread-
spectrum) present on the driving external clock to the
SYNCOUT pin.
Automatic Slew-Rate Control on LX
The MAX16936 has automatic slew-rate adjustment that
optimizes the rise times on the internal HSFET gate drive to
minimize EMI. The IC detects the internal clock frequency
and adjusts the slew rate accordingly. When the user
selects the external frequency setting resistor R
FOSC
such
that the frequency is > 1.1MHz, the HSFET is turned on in
4ns (typ). When the frequency is < 1.1MHz the HSFET is
turned on in 8ns (typ). This slew-rate control optimizes the
rise time on LX node externally to minimize EMI while main-
taining good efficiency.
Internal Oscillator (FOSC)
The switching frequency, f
SW
, is set by a resistor (R
FOSC
)
connected from FOSC to AGND. See Figure 3 to select
the correct R
FOSC
value for the desired switching fre-
quency. For example, a 400kHz switching frequency is set
with R
FOSC
= 73.2kI. Higher frequencies allow designs
with lower inductor values and less output capacitance.
Consequently, peak currents and I
2
R losses are lower at
higher switching frequencies, but core losses, gate charge
currents, and switching losses increase.
Synchronizing Output (SYNCOUT)
SYNCOUT is an open-drain output that outputs a 180N
out-of-phase signal relative to the internal oscillator.
Overtemperature Protection
Thermal-overload protection limits the total power dis-
sipation in the device. When the junction temperature
exceeds 175NC (typ), an internal thermal sensor shuts
down the internal bias regulator and the step-down con-
troller, allowing the device to cool. The thermal sensor
turns on the device again after the junction temperature
cools by 15NC.
Figure 2. Adjustable Output-Voltage Setting
R
FB2
R
FB1
FB
V
OUT
MAX16936