Datasheet
MAX16935
36V, 3.5A, 2.2MHz Step-Down Converter
with 28µA Quiescent Current
9Maxim Integrated
PIN
NAME FUNCTION
TQFN
TSSOP
10 11 SUP
Voltage Supply Input. SUP powers up the internal linear regulator. Bypass SUP to
PGND with a 4.7FF ceramic capacitor. It is recommended to add a placeholder for
an RC filter to reduce noise on the internal logic supply (see the Typical Application
Circuit)
11 12 SUPSW
Internal High-Side Switch Supply Input. SUPSW provides power to the internal switch.
Bypass SUPSW to PGND with 0.1FF and 4.7FF ceramic capacitors.
12, 13 13, 14 LX Inductor Switching Node. Connect a Schottky diode between LX and AGND.
14 15 PGND Power Ground
15 16 PGOOD
Open-Drain, Active-Low Power-Good Output. PGOOD asserts when V
OUT
is above
95% regulation point. PGOOD goes low when V
OUT
is below 92% regulation point.
— — EP
Exposed Pad. Connect EP to a large-area contiguous copper ground plane for
effective power dissipation. Do not use as the only IC ground connection. EP must be
connected to PGND.
Detailed Description
The MAX16935 is a 3.5A current-mode step-down
converter with integrated high-side and low-side
MOSFETs designed to operate with an external Schottky
diode for better efficiency. The low-side MOSFET
enables fixed-frequency forced-PWM (FPWM) operation
under light-load applications. The device operates with
input voltages from 3.5V to 36V, while using only 28FA
quiescent current at no load. The switching frequency
is resistor programmable from 220kHz to 2.2MHz and
can be synchronized to an external clock. The output
voltage is available as 5V fixed or adjustable from 1V
to 10V. The wide input voltage range along with its abil-
ity to operate at 98% duty cycle during undervoltage
transients make the device ideal for automotive and
industrial applications.
Under light-load applications, the FSYNC logic input
allows the device to either operate in skip mode for
reduced current consumption or fixed-frequency FPWM
mode to eliminate frequency variation to minimize EMI.
Fixed frequency FPWM mode is extremely useful for
power supplies designed for RF transceivers where
tight emission control is necessary. Protection
features include cycle-by-cycle current limit, over-
voltage protection, and thermal shutdown with auto-
matic recovery. Additional features include a power-
good monitor to ease power-supply sequencing
and a 180N out-of-phase clock output relative to the
internal oscillator at SYNCOUT to create cascaded power
supplies with multiple devices.
Wide Input Voltage Range
The device includes two separate supply inputs (SUP and
SUPSW) specified for a wide 3.5V to 36V input voltage
range. V
SUP
provides power to the device and V
SUPSW
provides power to the internal switch. When the device
is operating with a 3.5V input supply, conditions such as
cold crank can cause the voltage at SUP and SUPSW to
drop below the programmed output voltage. Under such
conditions, the device operates in a high duty-cycle mode
to facilitate minimum dropout from input to output.
In applications where the input voltage exceeds 25V,
output is ≤ 5V, operating frequency is ≥ 1.8MHz and
the IC is selected to be in FPWM mode by either forcing
the FSYNC pin high, or using an external clock, pulse
skipping is observed on the LX pin. This happens due
to insufficient minimum on time. Under certain load con-
ditions (typically < 1A), a filter circuit from LX to GND is
required to maintain the output voltage within the expect-
ed data sheet limits. A typical filter value of R
FILTER
= 1I,
C
FILTER
= 220pF (see the Typical Application Circuit) is
sufficient to filter out the noise and maintain the output
voltage within data sheet limits. This extra filter on the LX
pin of the IC has no impact on efficiency.
Linear Regulator Output (BIAS)
The device includes a 5V linear regulator (BIAS) that
provides power to the internal circuit blocks. Connect a
1FF ceramic capacitor from BIAS to AGND.
Pin Descriptions (continued)