Datasheet
MAX16932/MAX16933
2.2MHz, 36V, Dual Buck
with 20µA Quiescent Current
17Maxim Integrated
and:
DCR
EQ
L11
R
C R1 R2
= +
where R
CSHL
is the required current-sense resistor and
R
DCR
is the inductor’s series DC resistor. Use the induc-
tance and R
DCR
values provided by the inductor
manufacturer.
Carefully observe the PCB layout guidelines to ensure
the noise and DC errors do no corrupt the differential
current-sense signals seen by CS_ and OUT_. Place
the sense resistor close to the devices with short, direct
traces, making a Kelvin-sense connection to the current-
sense resistor.
Input Capacitor in Buck Converters
The discontinuous input current of the buck converter
causes large input ripple currents and therefore the input
capacitor must be carefully chosen to withstand the input
ripple current and keep the input voltage ripple within
design requirements. The 180° ripple phase operation
increases the frequency of the input capacitor ripple
current to twice the individual converter switching fre-
quency. When using ripple phasing, the worst-case input
capacitor ripple current is when the converter with the
highest output current is on.
The input voltage ripple is composed of DV
Q
(caused by
the capacitor discharge) and DV
ESR
(caused by the ESR
of the input capacitor). The total voltage ripple is the sum
of DV
Q
and DV
ESR
that peaks at the end of an on-cycle.
Calculate the input capacitance and ESR required for a
specific ripple using the following equation:
( )
ESR
PP
LOAD(MAX)
OUT
LOAD(MAX)
IN
IN
Q SW
V
ESR[ ]
I
I
2
V
Ix
V
C [µF]
V xf
−
∆
Ω=
∆
+
=
∆
where:
( )
−
−
∆=
IN OUT OUT
PP
IN SW
V V xV
I
V xf xL
I
LOAD(MAX)
is the maximum output current in A, DI
P-P
is
the peak-to-peak inductor current in A, f
SW
is the switch-
ing frequency in MHz, and L is the inductor value in µH.
The internal 5V linear regulator (BIAS) includes an output
UVLO with hysteresis to avoid unintentional chattering
during turn-on. Use additional bulk capacitance if the
input source impedance is high. At lower input voltage,
additional input capacitance helps avoid possible under-
shoot below the undervoltage lockout threshold during
transient loading.
Output Capacitor in Buck Converters
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as to
the chemistry of the capacitor technology. The capacitor
is usually selected by ESR and the voltage rating rather
than by capacitance value.
When using low-capacity filter capacitors, such as
ceramic capacitors, size is usually determined by the
capacity needed to prevent V
SAG
and V
SOAR
from caus-
ing problems during load transients. Generally, once
enough capacitance is added to meet the overshoot
requirement, undershoot at the rising load edge is no
longer a problem (see the Transient Considerations sec-
tion). However, low-capacity filter capacitors typically
have high-ESR zeros that can affect the overall stability.
The total voltage sag (V
SAG
) can be calculated as follows:
∆
=
×−
∆ −∆
+
2
LOAD(MAX)
SAG
OUT IN MAX OUT
LOAD(MAX)
OUT
L( I )
V
2C ((V D ) V )
I (t t)
C
The amount of overshoot (V
SOAR
) during a full-load to
no-load transient due to stored inductor energy can be
calculated as:
∆
≈
2
LOAD(MAX)
SOAR
OUT OUT
(I )L
V
2C V
ESR Considerations
The output filter capacitor must have low enough equiva-
lent series resistance (ESR) to meet output ripple and
load-transient requirements, yet have high enough ESR
to satisfy stability requirements. When using high-capaci-
tance, low-ESR capacitors, the filter capacitor’s ESR dom-
inates the output voltage ripple. So the output capacitor’s
size depends on the maximum ESR required to meet the
output-voltage ripple (V
RIPPLE(P-P)
) specifications:
−
=
RIPPLE(P P) LOAD(MAX)
V ESR x I x LIR










