Datasheet

MAX16932/MAX16933
2.2MHz, 36V, Dual Buck
with 20µA Quiescent Current
13Maxim Integrated
MOSFET Gate Drivers (DH_ and DL_)
The DH_ high-side n-channel MOSFET drivers are pow-
ered from capacitors at BST_ while the low-side drivers
(DL_) are powered by the 5V linear regulator (BIAS). On
each channel, a shoot-through protection circuit monitors
the gate-to-source voltage of the external MOSFETs to
prevent a MOSFET from turning on until the complemen-
tary switch is fully off. There must be a low-resistance,
low-inductance path from the DL_ and DH_ drivers to the
MOSFET gates for the protection circuits to work properly.
Follow the instructions listed to provide the necessary low-
resistance and low-inductance path:
• Use very short, wide traces (50 mils to 100 mils wide
if the MOSFET is 1in from the driver).
It may be necessary to decrease the slew rate for the
gate drivers to reduce switching noise or to compensate
for low-gate charge capacitors. For the low-side drivers,
use gate capacitors in the range of 1nF to 5nF from DL_
to GND. For the high-side drivers, connect a small 5I to
10I resistor between BST_ and the bootstrap capacitor.
Note: Gate drivers must be protected during shutdown,
at the absence of the supply voltage (V
BIAS
= 0V) when
the gate is pulled high either capacitively or by the leak-
age path on the PCB. Therefore, external gate pulldown
resistors are needed, to prevent making a direct path
from V
BAT
to GND.
High-Side Gate-Driver Supply (BST_)
The high-side MOSFET is turned on by closing an inter-
nal switch between BST_ and DH_ and transferring the
bootstrap capacitor’s (at BST_) charge to the gate of
the high-side MOSFET. This charge refreshes when the
high-side MOSFET turns off and the LX_ voltage drops
down to ground potential, taking the negative terminal
of the capacitor to the same potential. At this time the
bootstrap diode recharges the positive terminal of the
bootstrap capacitor.
The selected n-channel high-side MOSFET determines
the appropriate boost capacitance values (C
BST_
in the
Typical Operating Circuit) according to the following
equation:
=
∆
G
BST_
BST_
Q
C
V
where Q
G
is the total gate charge of the high-side
MOSFET and DV
BST_
is the voltage variation allowed
on the high-side MOSFET driver after turn-on. Choose
DV
BST_
such that the available gate-drive voltage is not
significantly degraded (e.g., DV
BST_
= 100mV to 300mV)
when determining C
BST_
.
The boost capacitor should be a low-ESR ceramic
capacitor. A minimum value of 100nF works in most
cases.
Current Limiting and Current-Sense
Inputs (OUT_ and CS_)
The current-limit circuit uses differential current-sense
inputs (OUT_ and CS_) to limit the peak inductor current.
If the magnitude of the current-sense signal exceeds the
current-limit threshold (V
LIMIT1,2
= 80mV (typ)), the PWM
controller turns off the high-side MOSFET. The actual
maximum load current is less than the peak current-
limit threshold by an amount equal to half of the inductor
ripple current. Therefore, the maximum load capability is
a function of the current-sense resistance, inductor value,
switching frequency, and duty cycle (V
OUT_
/V
IN
).
For the most accurate current sensing, use a current-
sense shunt resistor (R
SH
) between the inductor and
the output capacitor. Connect CS_ to the inductor side
of R
SH
and OUT_ to the capacitor side. Dimension
R
SH
such that the maximum inductor current (I
L,MAX
= I
LOAD,MAX
+1/2 I
RIPPLE,PP
) induces a voltage of
V
LIMIT1,2
across R
SH
including all tolerances.
For higher efficiency, the current can also be measured
directly across the inductor. This method could cause
up to 30% error over the entire temperature range and
requires a filter network in the current-sense circuit. See
the Current-Sense Measurement section.
Voltage Monitoring (PGOOD_)
The MAX16932/MAX16933 include several power moni-
toring signals to facilitate power-supply sequencing and
supervision. PGOOD_ can be used to enable circuits that
are supplied by the corresponding voltage rail, or to turn
on subsequent supplies.
Each PGOOD_ goes high (high impedance) when the
corresponding regulator output voltage is in regulation.
Each PGOOD_ goes low when the corresponding regula-
tor output voltage drops below 15% (typ) or rises above
15% (typ) of its nominal regulated voltage. Connect a
10kI (typ) pullup resistor from PGOOD_ to the relevant
logic rail to level-shift the signal.
PGOOD_ asserts low during soft-start, soft-discharge,
and when either buck converter is disabled (either EN1
or EN2 is low).
To ensure latchup immunity on the PGOOD1 pin,
in compliance with the AEC-Q100 guidelines, a
minimum resistance of 100Ω should be placed