Datasheet

MAX16907
36V, 2.2MHz Step-Down Converter
with Low Operating Current
16Maxim Integrated
Ordering Information
/V denotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
**EP = Exposed pad.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns (foot-
prints), go to www.maximintegrated.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
C
pMOD C
1
C
2f R
=
π× ×
If f
zMOD
is less than 5 x f
C
, add a second capacitor C
F
from COMP to GND. Set f
pEA
= f
zMOD
and calculate C
F
as follows:
F
zMOD C
1
C
2f R
=
π× ×
PCB Layout Guidelines
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer board
whenever possible for better noise immunity and power
dissipation. Follow these guidelines for good PCB layout:
1) Use a large contiguous copper plane under the IC
package. Ensure that all heat-dissipating components
have adequate cooling. The bottom pad of the device
must be soldered down to this copper plane for effec-
tive heat dissipation and for getting the full power out
of the IC. Use multiple vias or a single large via in this
plane for heat dissipation.
2) Isolate the power components and high-current path
from the sensitive analog circuitry. This is essential to
prevent any noise coupling into the analog signals.
3) Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation. The high-current path composed
of input capacitor, high-side FET, inductor, and output
capacitor should be as short as possible.
4) Keep the power traces and load connections short.
This practice is essential for high efficiency. Use
thick copper PCBs (2oz vs. 1oz) to enhance full-load
efficiency.
5) The analog signal lines should be routed away from
the high-frequency planes. This ensures integrity of
sensitive signals feeding back into the IC.
6) The ground connection for the analog and power
section should be close to the IC. This keeps the
ground current loops to a minimum. In cases where
only one ground is used, enough isolation between
analog return signals and high-power signals must
be maintained.
PART SPREAD SPECTURM TEMP RANGE PIN-PACKAGE
MAX16907RAUE/V+ Disabled -40NC to +125NC 16 TSSOP-EP**
MAX16907RAUE+ Disabled -40NC to +125NC 16 TSSOP-EP**
MAX16907SAUE/V+ Enabled -40NC to +125NC 16 TSSOP-EP**
MAX16907SAUE+ Enabled -40NC to +125NC 16 TSSOP-EP**
MAX16907RATE/V+ Disabled -40NC to +125NC 16 TQFN-EP**
MAX16907RATE+ Disabled -40NC to +125NC 16 TQFN-EP**
MAX16907SATE/V+ Enabled -40NC to +125NC 16 TQFN-EP**
MAX16907SATE+ Enabled -40NC to +125NC 16 TQFN-EP**
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
16 TSSOP-EP U16E+3
21-0108 90-0120
16 TQFN-EP T1655+4
21-0140 90-0121