Datasheet

8 Maxim Integrated
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
MAX16833/MAX16833B–MAX16833D
Pin Description
PIN NAME FUNCTION
1
LFRAMP
(MAX16833/
MAX16833C)
Low-Frequency Ramp Output. Connect a capacitor from LFRAMP to ground to program the ramp
frequency, or connect to SGND if not used. A resistor can be connected between LFRAMP and RT/
SYNC to dither the PWM switching frequency to achieve spread spectrum.
REF
(MAX16833B/
MAX16833D)
1.64V Reference Output. Connect a 1FF ceramic capacitor from REF to SGND to provide a stable
reference voltage. Connect a resistive divider from REF to ICTRL for analog dimming.
2 RT/SYNC
PWM Switching Frequency Programming Input. Connect a resistor (R
RT
) from RT/SYNC to SGND
to set the internal clock frequency. Frequency = (7.350 x 10
9
)/R
RT
for the MAX16833/MAX16833B.
Frequency = (6.929 x10
9
)/R
RT
for the MAX16833C/MAX16833D. An external pulse can be applied
to RT/SYNC through a coupling capacitor to synchronize the internal clock to the external pulse
frequency. The parasitic capacitance on RT/SYNC should be minimized.
3 SGND Signal Ground
4 ICTRL
Analog Dimming-Control Input. The voltage at ICTRL sets the LED current level when V
ICTRL
< 1.2V.
For V
ICTRL
> 1.4V, the internal reference sets the LED current.
5 COMP
Compensation Network Connection. For proper compensation, connect a suitable RC network from
COMP to ground.
6
FLT Active-Low, Open-Drain Fault Indicator Output. See the Fault Indicator (FLT) section.
7 PWMDIM
PWM Dimming Input. When PWMDIM is pulled low, DIMOUT is pulled high and PWM switching is
disabled. PWMDIM has an internal pullup resistor, defaulting to a high state when left unconnected.
8 OVP
LED String Overvoltage-Protection Input. Connect a resistive divider between ISENSE+, OVP, and
SGND. When the voltage on OVP exceeds 1.23V, a fast-acting comparator immediately stops PWM
switching. This comparator has a hysteresis of 70mV.
9
DIMOUT
Active-Low External Dimming p-Channel MOSFET Gate Driver
10 ISENSE-
Negative LED Current-Sense Input. A 100I resistor is recommended to be connected between
ISENSE- and the negative terminal of the LED current-sense resistor. This preserves the absolute
maximum rating of the ISENSE- pin during LED short circuit.
11 ISENSE+
Positive LED Current-Sense Input. The voltage between ISENSE+ and ISENSE- is proportionally
regulated to the lesser of V
ICTRL
or 1.23V.
12 CS
Switching Regulator Current-Sense Input. Add a resistor from CS to switching MOSFET current-sense
resistor terminal for programming slope compensation.
13 PGND Power Ground
14 NDRV External n-channel MOSFET Gate-Driver Output
15 V
CC
7V Low-Dropout Voltage Regulator Output. Bypass V
CC
to PGND with a 1FF (min) ceramic capacitor.
16 IN
Positive Power-Supply Input. Bypass IN to PGND with at least a 1FF ceramic capacitor.
— EP
Exposed Pad. Connect EP to the ground plane for heatsinking. Do not use EP as the only electrical
connection to ground.