Datasheet

coupling. If there is still an unacceptable amount of ripple
after the PC board layout has been optimized, consider
increasing output capacitance. Adding more capacitance
does not eliminate the ripple, but proportionally reduces
the amplitude of the ripple. If increasing the output capaci-
tance is not desirable because of space or cost concerns,
then consider slowing the turn-on of the step-down
DC-to-DC MOSFETs. Slower turn-on leads to smoother
LX rising and falling edges and consequently reduces the
switching noise. When slowing down MOSFET turn-on,
ensure the turn-off time is not affected. Otherwise, the
adaptive dead-time circuitry may not work properly and
shoot-through may occur. See the MOSFET Gate Drivers
section for details on how to slow down the turn-on of both
DH and DL.
Stability Requirements
The MAX1530/MAX1531 linear-regulator controllers use
an internal transconductance amplifier to drive an external
pass transistor. The transconductance amplifier, the pass
transistor, the base-emitter resistor, and the output capac-
itor determine loop stability. The following applies equally
to all linear regulators in the MAX1530 and MAX1531.
Any differences are highlighted where appropriate.
The transconductance amplifier regulates the output volt-
age by controlling the pass transistor’s base current. The
total DC loop gain is approximately:
BIAS FE
V(LR) REF
T LOAD
Ih
4
A1V
VI


×
≈ ×+ ×




where V
T
is 26mV at room temperature, I
LOAD
is the
output current of the linear regulator, V
REF
is the linear
regulator’s internal reference voltage, and I
BIAS
is the
current through the base-to-emitter resistor (R
BE
). Each
of the linear regulator controllers is designed for a differ-
ent maximum output current so they have different output
drive currents and different bias currents (IBIAS). Each
controller’s bias current can be found in the Electrical
Characteristics. The current listed in the Conditions col-
umn for the FBL_ regulation voltage specification is the
individual controller’s bias current. The base-to-emitter
resistor for each controller should be chosen to set the
correct I
BIAS
:
BE
BE
BIAS
V
R
I
=
The output capacitor and the load resistance create the
dominant pole in the system. However, the internal ampli-
fier delay, the pass transistor’s input capacitance, and the
stray capacitance at the feedback node create additional
poles in the system, and the output capacitor’s ESR gen-
erates a zero. For proper operation, use the following
steps to ensure the linear regulator’s stability:
1) First, calculate the dominant pole set by the linear
regulator’s output capacitor and the load resistor:
POLE(LR)
LR LOAD
1
f
2µC R
=
where C
LR
is the output capacitance of the linear regu-
lator and R
LOAD
is the load resistance corresponding
to the maximum load current.
The unity-gain crossover of the linear regulator is:
CROSSOVER V(LDO) POLE(LDO)
f Af=
2) The pole created by the internal amplifier delay is
about 1MHz:
POLE(AMP)
f 1M H z≅
3) Next, calculate the pole set by the transistor’s input
capacitance, the transistor’s input resistance, and the
base-to-emitter pullup resistor
IN
POLE(C )
IN BE IN
1
f
2µC (R || R )
=
m FE
IN IN µ m
Tm
gh
where C , R R , g is the
2µf g
= = =
transconductance of the pass transistor, and f
T
is the
transition frequency. Both parameters can be found
in the transistor’s data sheet. Because R
BE
is much
greater than R
IN
, the above equation can be simpli-
fied:
IN
POLE(C )
IN IN
1
f
2µC R
≈
The equation can be further simplified:
IN
POLE(C )
FE
MAX1530/MAX1531 Multiple-Output Power-Supply
Controllers for LCD Monitors
www.maximintegrated.com
Maxim Integrated │ 30