Datasheet

LR2 is typically used to generate the TFT LCD gamma
reference voltage, which is usually 0.3V below the source
drive supply voltage.
LR2 is enabled when the step-down regulator is enabled
and the voltage on ONL2 exceeds ONL2 input threshold
(1.238V typ). (See the Startup Sequence (ONL_,SEQ)
section.) Each time it is enabled, the controller goes
through a soft-start routine that ramps up its internal refer-
ence DAC. (See the Soft-Start section).
Linear Regulator Controller (LR3)
LR3 is an analog gain block with an open-drain Nchannel
output. It drives an external PNP pass transistor with a
6.8kΩ base-to-emitter resistor. Its guaranteed base drive
sink current is at least 2mA. The regulator, including Q3 in
Figure 1, uses a 0.47μF output capacitor and is designed
to deliver 20mA at 25V. The regulator including Q3 in
Figure 2 uses a 4.7μF output capacitor and is designed
to deliver 500mA at 10V.
For the MAX1531 (Figure 1), LR3 is typically used to
generate the TFT LCD gate driver’s gate-on voltage. A
sufficient input voltage can be produced using a charge-
pump circuit as shown in Figure 1. Note that the voltage
rating of the DRV3 output is 28V. If higher voltages are
present, an external cascode NPN transistor (Q6) should
be used with the emitter connected to DRV3, the base
to V
IN
(which is the connection point of C1 and R12 in
Figure 1), and the collector to the base of the PNP pass
transistor (Figure 1). For the MAX1530 (Figure 2), LR3 is
typically used to generate the TFT LCD source drive sup-
ply voltage. The input for this regulator can come directly
from the input supply, be produced from an external step-
up regulator, or from an extra windingcoupled to the main
step-down regulator inductor.
LR3 is enabled when the step-down regulator is enabled
and the voltage on ONL3 exceeds the ONL3 input thresh-
old (1.238V typ). (See the Startup Sequence (ONL_,SEQ)
section.) Each time it is enabled, the controller goes
through a soft-start routine that ramps up its internal refer-
ence DAC. (See the Soft-Start section.)
Source Drive Regulator Controller (LR4)
(MAX1531 Only)
LR4 is an analog gain block with an open-drain Nchannel
output. It drives an external PNP pass transistor with a
1.5kΩ base-to-emitter resistor. Its guaranteed base drive
sink current is at least 10mA. The regulator including Q4
in Figure 1 uses a 4.7μF output capacitor and is designed
to deliver 500mA at 10V. The regulator’s fast transient
response allows it to handle brief peak currents up to 2A.
LR4 is typically used to generate the TFT LCD source
drive supply voltage. The input for this regulator can come
directly from the input supply, be produced from an exter-
nal step-up regulator, or from an extra winding coupled
to the main step-down regulator inductor. LR4 is enabled
when the step-down regulator is enabled and the voltage
on ONL4 exceeds the ONL4 input threshold (1.238V typ).
(See the Startup Sequence (ONL_,SEQ) section.) Each
time it is enabled, the regulator goes through a soft-start
routine that ramps up its internal reference DAC from 0V
to 1.238V (typ). (See the Soft-Start section.)
The standard application circuit in Figure 1 powers the
LR4 regulator directly from the input supply and uses
the MAX1531’s general-purpose overcurrent protection
function to protect the input supply from excessive load
currents. (See the Overcurrent Protection section.)
Gate-Off Regulator Controller (LR5)
(MAX1531 Only)
LR5 is an analog gain block with an open-drain P-channel
output. It drives an external NPN pass transistor with a
6.8kΩ base-to-emitter resistor. Its guaranteed base drive
sink current is at least 2mA. The regulator including Q5 in
Figure 1 uses a 0.47μF output capacitor and is designed
to deliver 10mA at -10V.
LR5 is typically used to generate the TFT LCD gate
driver’s gate-off voltage. A negative input voltage can
be produced using a charge-pump circuit as shown in
Figure 1. Use as many stages as necessary to obtain the
required output voltage.
LR5 is enabled when the step-down regulator is enabled
and the voltage on ONL5 exceeds the ONL5 input thresh-
old (1.238V typ). (See the Startup Sequence (ONL_,SEQ)
section.) Each time it is enabled, the regulator goes
through a soft-start routine that ramps down its internal
reference DAC from VL to 125mV (typ). (See the Soft-
Start section.)
Internal 5V Linear Regulator (VL)
All MAX1530/MAX1531 functions, except the thermal
sensor, are internally powered from the on-chip, lowdro-
pout 5V regulator. The maximum regulator input voltage
(V
IN
) is 28V. Bypass the regulator’s output (VL) with at
least a 1μF ceramic capacitor to AGND. The V
IN
-to-VL
dropout voltage is typically 200mV, so when V
IN
is less
than 5.2V, VL is typically V
IN
- 200mV. The internal linear
regulator can source up to 30mA to supply the device,
power the low-side gate driver, charge the external boost
capacitor, and supply small external loads. When driving
particularly large MOSFETs, little or no regulator current
may be available for external loads. For example, when
MAX1530/MAX1531 Multiple-Output Power-Supply
Controllers for LCD Monitors
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