Datasheet

active current limit amplifier (ACL). The electronic circuit
breaker turns off the hot-swap MOSFET with a 500µA
current from GATE to OUT if the voltage across the sense
resistor exceeds V
CB_TH
(ECB) for longer than the fault
filter delay configured at the CDLY pin. Active current
limiting begins when the sense voltage exceeds the ACL
threshold V
ACL
(ACL) (which is 1.3X the ECB threshold).
The gate of the hot-swap MOSFET is brought under
control by the ACL amplifier and the output current is
regulated to maintain the ACL threshold across the sense
resistor. At this point, the fault filter starts the timeout with
a 100µA current charging the CDLY pin capacitor. If the
CDLY pin voltage exceeds its threshold (1.2V), the exter-
nal MOSFET is turned off and the FAULT pin pulls low.
After the hot-swap MOSFET turns off, the CDLY pin
capacitor is discharged with a 2µA pulldown current until
it reaches 0.2V. This is followed by a cool-off period of
14 timing cycles at the CDLY pin. For the autoretry part,
the latched fault is cleared automatically at the end of the
cool-off period and the GATE pin restarts charging up the
gate of the MOSFET.
In the event of a severe short-circuit fault on the 12V
output, the output current can surge to tens of amperes.
The device responds within 1Fs to bring the current under
control by pulling the GATE to OUT voltage down with a
200mA current. Almost immediately, the gate of the hot-
swap MOSFET recovers rapidly due to the R
GATE
and
C
GATE
network, and load current is actively limited until
the electronic circuit breaker times out. Due to parasitic
supply lead inductance, an input supply without any bypass
capacitor may collapse during the high current surge and
then spike upwards when the current is interrupted.
Circuit-Breaker Comparator and Current Limit
The device features a programmable circuit-breaker
threshold. The current limit can be selected by the
connection of the CB pin. During startup, a foldback cur-
rent limit is active to protect the internal MOSFET to oper-
ate within the SOA (Figure 1).
Programmable Circuit-Breaker Current Threshold
The device features a programmable current limit with
circuit-breaker function that protects the external
MOSFETs against short circuits or excessive load current.
The voltage across the external sense resistor, (R
SENSE
)
is monitored by an electronic circuit breaker (ECB) and
active current limit (ACL) amplifier. Connect the CB pin to
GND, V
S
, or leave unconnected to select the electronics
circuit-breaker threshold (Table 1).
The electronic circuit breaker turns off the hot-swap
MOSFET with a 500µA current from GATE to GND if the
voltage across the sense resistor exceeds V
CB_TH (CB)
(50mV) for longer than the fault filter delay configured at
the CDLY pin.
Timer (CDLY)
An external capacitor connected from the CDLY pin to
GND serves as fault filtering when the supply output is in
active current limit. When the voltage across the sense
resistor exceeds the circuit-breaker trip threshold (50mV),
CDLY pulls up with 100µA. Otherwise, it pulls down
with 2µA. The fault filter times out when the 1.2V CDLY
threshold is exceeded, causing the corresponding FAULT
pin to pull low. The fault filter delay or circuit-breaker time
delay is:
t
CB
= C
CDLY
x 12[ms/µF]
After the circuit-breaker timeout, the CDLY pin capacitor
pulls down with 2µA from the 1.2V CDLY threshold until
it reaches 0.2V. Then it completes 14 cooling cycles con-
sisting of the CDLY pin capacitor charging to 1.2V with a
100µA current and discharging to 0.2V with a 2µA current.
At that point, the GATE pin voltage is allowed to start up
if the fault has been cleared as described in the Resetting
Faults section. When the latched fault is cleared during
the cool-off period, the corresponding FAULT pin pulls
high. The total cool-off time for the MOSFET after an
overcurrent fault is:
t
COOL
= C
CDLY
x 11[s/µF]
ORing/Hot-Swap Response in
Overload Condition
In the case where an overcurrent fault occurs on the out-
put, the current is limited to a programmed current limit set
through the CB pin. After a fault filter delay set by 100µA
current source in to the CDLY pin capacitor, the circuit
breaker trips, pulls the GATE pin low, and turns off the hot-
swap MOSFET. The FAULT output is latched low. During
the fault condition, the ORing MOSFET remains on.
Control Inputs
ON Input
The device drives the OG_ as soon as the V
IN1
- V
F1
(V
F1
is the forward voltage drop of ORing MOSFET
connected to IN1) or V
IN2
- V
F2
(V
F2
is the forward volt-
age drop of the ORing MOSFET connected to IN2) supply
voltage generates a V
ON
above the threshold voltage. An
external resistive divider from CSP to ON and ground is
used to set the turn-on voltage to any desired voltage from
2.9V to 5.5V. The IC turns on the corresponding ORing
MOSFET and then turns on the hot-swap MOSFET when
V
ON
> 1.22V.
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
www.maximintegrated.com
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