Datasheet

and maintains -20dB/decade slope up to 1/2 of the
switching frequency. This is likely to occur if the output
capacitor is low-ESR tantalum. Set f
P2
= fZO.
When using a ceramic capacitor, the capacitor ESR zero
(f
ZO
) is likely to be located even above one half of the
switching frequency, f
PO
< f
O
< f
SW/2
< f
ZO
. In this case,
place the frequency of the second pole (f
P2
) high enough
in order not to significantly erode the phase margin at the
crossover frequency. For example, set fP2 at 5 x fO so
that the contribution to phase loss at the crossover fre-
quency fO is only about 11°:
f
P2
= 5 x f
O
Once f
P2
is known, calculate R
I
:
I
P2 I
1
R
2f C
=
π× ×
4) Place the second zero (f
Z2
) at 0.2 x f
O
or at f
PO
,
whichever is lower and calculate R
1
using the following
equation:
1I
Z2 I
1
R -R
2f C
=
π× ×
5) Place the third pole (f
P3
) at one half the switching fre-
quency and calculate C
CF
:
( )
F
CF
SW F F
C
C
2 0.5 f R C - 1
=
π× × × ×
6) Calculate R
2
as:
FB
21
OUT FB
V
RR
VV
= ×
−
MOSFET Selection
The MAX15046 step-down controller drives two exter-
nal logic-level n-channel MOSFETs. The key selection
parameters to choose these MOSFETs include:
● On-resistance (R
DS(ON)
)
● Maximum Drain-to-Source Voltage (V
DS(MAX)
)
● Minimum Threshold Voltage (V
TH(MIN)
)
● Total Gate Charge (Q
G
)
● Reverse Transfer Capacitance (C
RSS
)
● Power Dissipation
The two n-channel MOSFETs must be a logic-level
type with guaranteed on-resistance specifications at
V
GS
= 4.5V. For maximum efficiency, choose a high-
side MOSFET that has conduction losses equal to the
switching losses at the typical input voltage. Ensure that
the conduction losses at minimum input voltage do not
exceed the MOSFET package thermal limits, or violate
the overall thermal budget. Also ensure that the conduc-
tion losses plus switching losses at the maximum input
voltage do not exceed package ratings or violate the
overall thermal budget. Ensure that the DL gate driver can
drive the low-side MOSFET. In particular, check that the
dv/dt caused by the high-side MOSFET turning on does
not pull up the low-side MOSFET gate through the drain-
to-gate capacitance of the low-side MOSFET, which is the
most frequent cause of crossconduction problems.
Check power dissipation when using the internal linear
regulator to power the gate drivers. Select MOSFETs with
low gate charge so that V
CC
can power both drivers with-
out overheating the device:
P
DRIVE
= V
CC
x Q
G_TOTAL
x f
SW
where Q
G_TOTAL
is the sum of the gate charges of the
two external MOSFETs.
Boost Capacitor and Diode Selection
The MAX15046 uses a bootstrap circuit to generate the
necessary gate-to-source voltage to turn on the high-side
MOSFET. The selected n-channel high-side MOSFET
determines the appropriate boost capacitance value
(C
BST
in the Typical Application Circuits) according to the
following equation:
G
BST
BST
Q
C
V
=
∆
where Q
G
is the total gate charge of the high-side
MOSFET and ΔV
BST
is the voltage variation allowed
on the high-side MOSFET driver after turn-on. Choose
Figure 4. Type III Compensation Network
V
REF
g
M
R
1
R
2
V
OUT
R
I
COMP
C
I
C
CF
R
F
C
F
MAX15046 40V, High-Performance, Synchronous
Buck Controller
www.maximintegrated.com
Maxim Integrated │ 18