Datasheet

To choose the appropriate compensation network type,
the power-supply poles and zeros, the zero-crossover
frequency, and the type of the output capacitor must be
determined first.
In a buck converter, the LC filter in the output stage intro-
duces a pair of complex poles at the following frequency:
PO
OUT OUT
1
f
2L C
=
π× ×
The output capacitor introduces a zero at:
ZO
OUT
1
f
2 ESR C
=
π× ×
where ESR is the equivalent series resistance of the out-
put capacitor.
The loop-gain crossover frequency (f
O
), where the loop
gain equals 1 (0dB) should be set below 1/10th of the
switching frequency:
SW
O
f
f
10
≤
Choosing a lower crossover frequency reduces the
effects of noise pickup into the feedback loop, such as
jittery duty cycle.
To maintain a stable system, two stability criteria must be
met:
1) The phase shift at the crossover frequency, fO, must
be less than 180°. In other words, the phase margin of
the loop must be greater than zero.
2) The gain at the frequency where the phase shift is
-180° (gain margin) must be less than 1.
Maintain a phase margin of around 60° to achieve a
robust loop stability and well-behaved transient response.
When using an electrolytic or large-ESR tantalum output
capacitor, the capacitor ESR zero f
ZO
typically occurs
between the LC poles and the crossover frequency fO
(f
PO
< f
ZO
< f
O
). Choose the Type II (PI-Proportional,
Integral) compensation network.
When using a ceramic or low-ESR tantalum output
capacitor, the capacitor ESR zero typically occurs above
the desired crossover frequency fO, that is f
PO
< f
O
<
f
ZO
. Choose the Type III (PID- Proportional, Integral, and
Derivative) compensation network.
Type II Compensation Network
(Figure 3)
If f
ZO
is lower than f
O
and close to f
PO
, the phase lead of
the capacitor ESR zero almost cancels the phase loss of
one of the complex poles of the LC filter around the cross-
over frequency. Use a Type II compensation network with
a midband zero and a high-frequency pole to stabilize the
loop. In Figure 3, R
F
and C
F
introduce a midband zero
(f
Z1
). R
F
and C
CF
in the Type II compensation network
provide a high-frequency pole (f
P1
), which mitigates the
effects of the output high-frequency ripple.
Use the following steps to calculate the component values
for Type II compensation network as shown in Figure 3:
1) Calculate the gain of the modulator (GAIN
MOD
),
comprised of the regulator’s pulse-width modulator,
LC filter, feedback divider, and associated circuitry at
crossover frequency:
( )
IN FB
MOD
RAMP O OUT OUT
VV
ESR
GAIN
V 2f L V
=××
π× ×
where V
IN
is the input voltage of the regulator, V
RAMP
is the amplitude of the ramp in the pulse-width modula-
tor, V
FB
is the FB input voltage set point (0.6V typically,
see the Electrical Characteristics table), and V
OUT
is the
desired output voltage.
The gain of the error amplifier (GAIN
EA
) in midband fre-
quencies is:
GAIN
EA
= g
M
x R
F
where g
M
is the transconductance of the error amplifier.
The total loop gain, which is the product of the modulator
gain and the error-amplifier gain at f
O
, is:
( )
MOD EA
IN FB
MF
OSC O OUT OUT
F
OSC O OUT OUT
F
FB IN M
1) GAIN GAIN 1
So :
VV
ESR
gR1
V (2 f L ) V
Solving for R :
V 2f L V
R
V V g ESR
×=
× × ××=
π× ×
× π× × ×
=
× ××
2) Set a midband zero (f
Z1
) at 0.75 x f
PO
(to cancel one
of the LC poles):
Z1 PO
FF
1
f 0.75 f
2R C
= = ×
π× ×
MAX15046 40V, High-Performance, Synchronous
Buck Controller
www.maximintegrated.com
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