Datasheet

When the valley current limit is reached during soft-start,
the MAX15046 regulates to the output impedance times
the limited inductor current and turns off after 4096 clock
cycles. When starting up into a large capacitive load (for
example), the inrush current will not exceed the current-
limit value. If the soft-start is not completed before 4096
clock cycles, the device turns off. The device remains off
for 8192 clock cycles before trying to soft-start again. This
implementation allows the soft-start time to be automati-
cally adapted to the time necessary to keep the inductor
current below the limit while charging the output capacitor.
Power-Good Output (PGOOD)
The MAX15046 includes a power-good comparator to
monitor the output voltage and detect the power-good
threshold, fixed at 93% of the nominal FB voltage. The
open-drain PGOOD output requires an external pullup
resistor. PGOOD sinks up to 2mA of current while low.
PGOOD goes high (high-Z) when the regulator output
increases above 93% of the designed nominal regulated
voltage. PGOOD goes low when the regulator output volt-
age drops to below 90% of the nominal regulated voltage.
PGOOD asserts low during the hiccup timeout period.
Startup into a Prebiased Output
When the MAX15046 starts into a prebiased output, DH
and DL are off so that the converter does not sink current
from the output. DH and DL do not start switching until
the PWM comparator commands the first PWM pulse.
The first PWM pulse occurs when the ramping reference
voltage increases above the FB voltage.
When the output voltage is biased above the output set
point, the controller tries to pull the output down to the
set point once the internal soft-start is complete. This
pulldown is controlled by the sink current limit, which is
slowly increased to its normal value to minimize output
undershoot.
Current-Limit Circuit (LIM)
The current-limit circuit employs a ‘valley’ and sink
current-sensing algorithm that uses the on-resistance
of the low-side MOSFET as a current-sensing element
to eliminate costly sense resistors. The current-limit
circuit is also temperature-compensated to track the on-
resistance variation of the MOSFET overtemperature.
The current limit is adjustable with an external resistor at
LIM and accommodates MOSFETs with a wide range of
on-resistance characteristics (see the Setting the Valley
Current Limit section). The adjustment range is from 0.3V
to 3V for the valley current limit, corresponding to resistor
values of 6kΩ to 60kΩ. The valley current-limit threshold
across the low-side MOSFET is precisely 1/10th of the
voltage at LIM, while the sink current-limit threshold is
1/20th of the voltage at LIM.
Valley current limit acts when the inductor current flows
towards the load, and CSP is more negative than PGND
during the low-side MOSFET on-time. If the magnitude of
the current-sense signal exceeds the valley current-limit
threshold at the end of the low-side MOSFET on-time, the
MAX15046 does not initiate a new PWM cycle and lets
the inductor current decay in the next cycle. The control-
ler also ‘rolls back’ the internal reference voltage so that
the controller finds a regulation point determined by the
current-limit value and the resistance of the short. In this
manner, the controller acts as a constant current source.
This method greatly reduces inductor ripple current during
the short event, which reduces inductor sizing restrictions
and reduces the possibility for audible noise. After 4096
clock cycles, the device goes into hiccup mode. Once the
short is removed, the internal reference voltage soft-starts
back up to the normal reference voltage and regulation
continues.
Sink current limit is implemented by monitoring the volt-
age drop across the low-side MOSFET when CSP is more
positive than PGND. When the voltage drop across the
low-side MOSFET exceeds 1/20th of the voltage at LIM
at any time during the low-side MOSFET on-time, the
low-side MOSFET turns off and the inductor current flows
from the output through the body diode of the high-side
MOSFET. When the sink current limit activates, the DH/
DL switching sequence is no longer complementary and
both MOSFETs are turned off.
Carefully observe the PCB layout guidelines to ensure
that noise and DC errors do not corrupt the current-sense
signals at CSP and PGND. Mount the MAX15046 close
to the low-side MOSFET with short, direct traces making
a Kelvin-sense connection so that trace resistance does
not add to R
DS(ON)
of the low-side MOSFET.
Hiccup Mode Overcurrent Protection
Hiccup mode overcurrent protection reduces power dis-
sipation during prolonged short-circuit or severe overload
conditions. An internal 3-bit counter counts up on each
switching cycle when the valley current-limit threshold
is reached. The counter counts down on each switching
cycle when the threshold is not reached, and stops at zero
(000). When the current-limit condition persists and the
counter reaches 111 (= 7 events), the MAX15046 stops
both DL and DH drivers and waits for 4096 switching
MAX15046 40V, High-Performance, Synchronous
Buck Controller
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