Datasheet

+2.7V to +5.25V, Low-Power, 8-Channel,
Serial 10-Bit ADCs
MAX148/MAX149
3
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +2.7V to +5.25V; COM = 0; f
SCLK
= 2.0MHz; external clock (50% duty cycle); 15 clocks/conversion cycle (133ksps);
MAX149—4.7FF capacitor at V
REF
pin; MAX148—external reference, V
REF
= 2.500V applied to V
REF
pin; T
A
= T
MIN
to T
MAX
, unless
otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CONVERSION RATE (continued)
Internal Clock Frequency
SHDN = unconnected 1.8
MHz
SHDN = V
DD
0.225
External Clock Frequency
0.1 2.0
MHz
Data transfer only 1 2.0
ANALOG/COM INPUTS
Input Voltage Range, Single-
Ended and Differential (Note 6)
Unipolar, COM = 0 0 to V
REF
V
Bipolar, V
COM
= V
REF
/2 ±V
REF
/2
Multiplexer Leakage Current On/off leakage current, V
CH_
= 0 or V
DD
±0.01 ±1 μA
Input Capacitance 16 pF
INTERNAL REFERENCE (MAX149 Only, Reference Buffer Enabled)
V
REF
Output Voltage T
A
= +25°C (Note 7) 2.470 2.500 2.530 V
V
REF
Short-Circuit Current 30 mA
V
REF
Temperature Coefficient MAX149 ±30 ppm/°C
Load Regulation (Note 8) 0 to 0.2mA output load 0.35 mV
Capacitive Bypass at V
REF
Internal compensation mode 0
μF
External compensation mode 4.7
Capacitive Bypass at REFADJ 0.01 μF
REFADJ Adjustment Range ±1.5 %
EXTERNAL REFERENCE AT V
REF
(Buffer Disabled)
V
REF
Input Voltage Range
(Note 9)
1.0
V
DD
+
50mV
V
V
REF
Input Current V
REF
= 2.500V 100 150 μA
V
REF
Input Resistance 18 25 kΩ
Shutdown V
REF
Input Current 0.01 10 μA
REFADJ Buffer-Disable Threshold
V
DD
-
0.5
V
EXTERNAL REFERENCE AT REFADJ
Capacitive Bypass at V
REF
Internal compensation mode 0
μF
External compensation mode 4.7
Reference Buffer Gain
MAX149 2.06
V/V
MAX148 2.00
REFADJ Input Current
MAX149 ±50
μA
MAX148 ±10