Datasheet

4Maxim Integrated
MAX14920/MAX14921
High-Accuracy 12-/16-Cell Measurement AFEs
DC ELECTRICAL CHARACTERISTICS (continued)
(V
P
= +65V, DGND = AGND, V
L
= V
EN
= +3.3V, V
A
= +5V, C
SAMPLE
= 1FF, T
A
= -40°C to +85°C, unless otherwise noted. Typical
values are at T
A
= +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
ANALOG OUTPUT (AOUT)
Output Signal Range V
AOUT
Reference to AGND +0.3 V
A
- 0.3 V
Amplifier Offset Voltage V
OFFSET
V
AOUT
= +3.3V, after self-calibration
(Note 5)
Q50 Q100 FV
Temperature Offset Drift If not recalibrated
Q1.5 FV/°C
Gain A_V Gain = V
AOUT/
V
D
1 V/V
Output Error V
O_ERR
(Note 4) -0.5 +0.5 mV
Amplifier Gain Error V
GAIN_ERR
R
OUT
= 100kI, V
D
= 2V to 4.5V (Note 6)
-0.2 +0.2 mV
V
P
Monitor Voltage V
PMON
[SC0, SC1, SC2, SC3]
= [0, 0, 1, 1]
MAX14920 V
P
/12
V
MAX14921 V
P
/16
V
P
Monitor Accuracy V
PMONA
[SC0, SC1, SC2, SC3] =
[0, 0, 1, 1]
-0.25 0 +2.5 %
CHARGE-BALANCE DRIVERS (BA_)
Output Low V
BAL
I
BA_
= 1mA, V
CV(n)
- V
CV(n - 1)
= +3.3V
(Note 3)
V
CV(n - 1)
V
CV(n - 1)
+ 0.9
V
Output High V
BAH
I
BA_
= -1mA, V
CV(n)
- V
CV(n - 1)
= +3.3V
(Note 3)
V
CV(n)
- 1.5 V
CV(n)
V
Pulldown Resistance R
PDWN
0.65 0.9
kI
LOGIC OUTPUT (SDO)
Output Low Voltage V
OL
I
SINK
= 10mA +0.9 V
Output High Voltage V
OH
I
SOURCE
= 0.5mA V
L
- 0.25 V
Output Leakage Current I
L
V
CS
= V
L
-1 +1
FA
LOGIC INPUTS (SDI, SCLK, EN, SAMPL)
Input Low Voltage V
IL
V
L
< +2.3V 0.2 x V
L
V
+2.3V < V
L
< +5.5V 0.3 x V
L
Input High Voltage V
HL
V
L
< +2.3V 0.8 x V
L
V
+2.3V < V
L
< +5.5V 0.7 x V
L
Input Leakage Current I
L
-1 +1
FA
DYNAMIC CHARACTERISTICS
AOUT Settling Time t
SET
Measured between channels with
+4V signal change. Settling to Q1mV
accuracy, C
LOAD
= 100pF (Figure 1)
5
Fs
Sampling Time t
SAMPL
C
SAMPLE
= 1FF
4
ms
C
SAMPLE
= 1FF, error calibration
40
Holding Delay Time t
HD
Delay from SMPLB set to 1 or SAMPL
falling edge to holding of all cell voltages
0.5
Fs