Datasheet

11Maxim Integrated
MAX14920/MAX14921
High-Accuracy 12-/16-Cell Measurement AFEs
Pin Description (continued)
PIN
NAME FUNCTION
MAX14920
(64 TQFP-EP)
MAX14921
(80 TQFP)
21 37 CT11
Sampling Capacitor 11 High Terminal. CT11 internally connects to CV11 when
SAMPL is logic-high. Connect a 1FF capacitor between CT11 and CB11. Leave
CT11 unconnected if not used.
22 38 CB11
Sampling Capacitor 11 Low Terminal. CB11 internally connects to CV10 when
SAMPL is logic-high. Connect a 1FF capacitor between CT11 and CB11. Leave
CB11 unconnected if not used.
23 39 CV10
Cell Voltage Input 10. Connect CV10 to cell anode/cathode. Connect CV10 to the
highest voltage of the battery cell stack if not used.
24 40 BA10
Cell-Balancing Gate Driver Output 10. Connect BA10 to the gate of the external
n-channel FET. Leave BA10 unconnected if not used.
25 41 CT10
Sampling Capacitor 10 High Terminal. CT10 internally connects to CV10 when
SAMPL is logic-high. Connect a 1FF capacitor between CT10 and CB10. Leave
CT10 unconnected if not used.
26 42 CB10
Sampling Capacitor 10 Low Terminal. CB10 internally connects to CV9 when
SAMPL is logic-high. Connect a 1FF capacitor between CT10 and CB10. Leave
CB10 unconnected if not used.
27 43 CV9
Cell Voltage Input 9. Connect CV9 to cell anode/cathode. Connect CV9 to the
highest voltage of the battery cell stack if not used.
28 44 BA9
Cell-Balancing Gate Driver Output 9. Connect BA9 to the gate of the external
n-channel FET. Leave BA9 unconnected if not used.
29 45 CT9
Sampling Capacitor 9 High Terminal. CT9 internally connects to CV9 when
SAMPL is logic-high. Connect a 1FF capacitor between CT9 and CB9. Leave CT9
unconnected if not used.
30 46 CB9
Sampling Capacitor 9 Low Terminal. CB9 internally connects to CV8 when
SAMPL is logic-high. Connect a 1FF capacitor between CT9 and CB9. Leave CB9
unconnected if not used.
31 47 CV8
Cell Voltage Input 8. Connect CV8 to cell anode/cathode. Connect CV8 to the
highest voltage of the battery cell stack if not used.
32 48 BA8
Cell-Balancing Gate Driver Output 8. Connect BA8 to the gate of the external
n-channel FET. Leave BA8 unconnected if not used.
33 49 CT8
Sampling Capacitor 8 High Terminal. CT8 internally connects to CV8 when
SAMPL is logic-high. Connect a 1FF capacitor between CT8 and CB8. Leave CT8
unconnected if not used.
34 50 CB8
Sampling Capacitor 8 Low Terminal. CB8 internally connects to CV7 when
SAMPL is logic-high. Connect a 1FF capacitor between CT8 and CB8. Leave CB8
unconnected if not used.
35 51 CV7
Cell Voltage Input 7. Connect CV7 to cell anode/cathode. Connect CV7 to the
highest voltage of the battery cell stack if not used.