Datasheet

MAX14850
Six-Channel Digital Isolator
7Maxim Integrated
Test Circuits/Timing Diagrams
Figure 1. Test Circuit (A) and Timing Diagram (B) for Unidirectional Channels
Figure 2. Test Circuit (A) and Timing Diagrams (B) and (C) for Bidirectional Channels
0.1µF V
CCB
V
CCA
TEST
SOURCE
INA_ OUTB_
MAX14850
GNDA GNDB
V
CCA
V
CCB
C
L
R
L
0.1µF
50Ω
(A)
(B)
V
CCA
INA1, INA2
50% 50%
50%
50%
90%
10%
50%
t
DPHL
t
DSKEWCC
t
F
t
R
t
DPLH
OUTB1
OUTB2
V
CCB
V
CCB
GNDA
GNDB
GNDB
V
CCA
I/OA1, I/OA2
(A)
(B)
50% 50%
50%
90%
50%
10%
50%
t
DPHL
t
DSKEWCC
t
F
t
DPLH
I/OB1
I/OB2
V
CCB
V
CCB
GNDA
V
OL
(min)
V
OL
(min)
V
CCB
I/OB1, I/OB2
(C)
50% 50%
50%
50%
90%
10%
50%
t
DPHL
t
F
t
DPLH
I/OA1
I/OA2
V
CCA
V
CCA
GNDB
V
OL
(min)
V
OL
(min)
t
DSKEWCC
0.1µF V
CCB
V
CCA
TEST
SOURCE
I/OA_
I/OB_
MAX14850
GNDA GNDB
V
CCA
V
CCB
C
L2
C
L1
0.1µF
R
2
R
1