Datasheet
48 Maxim Integrated
Quad Serial UART with 128-Word FIFOs
MAX14830
XOFF1 Register
The XOFF1 and XOFF2 register contents define the XOFF characters for automatic XON/XOFF flow control and/or the
special characters used in special character detection. See details in the FlowCtrl register description.
Bits 7–0: Bit[n]
These bits define the XOFF1 character if single character XOFF auto software flow control is enabled in FlowCntrl[7:4].
If double character flow control is selected in FlowCntrl[7:4], these bits constitute the LSB of the XOFF character. If
special character detection is enabled in MODE2[4] and auto software flow control is not enabled, these bits define a
special character.
If special character detection and software flow control area both enabled, XOFF1 defines the XOFF flow control
character.
XOFF2 Register
The XOFF1 and XOFF2 register contents define the XOFF characters for automatic XON/XOFF flow control and/or spe-
cial characters used for special character detection. See details in the FlowCtrl register description.
Bits 7–0: Bit[n]
These bits define the XOFF2 character if auto software flow control is enabled in FlowCntrl[7:4]. If double character flow
control is selected in FlowCntrl[7:4], these bits constitute the MSB of the XOFF character. If special character detection
is enabled in MODE2[4] and auto flow control is not enabled, these bits define a special character. If both special char-
acter detection and auto flow control are enabled (MODE2[4] and FlowCntrl[3]), these bits define a special character.
ADDRESS: 0x16
MODE: R/W
BIT 7 6 5 4 3 2 1 0
NAME
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
RESET
0 0 0 0 0 0 0 0
ADDRESS: 0x17
MODE: R/W
BIT 7 6 5 4 3 2 1 0
NAME
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
RESET
0 0 0 0 0 0 0 0










