Datasheet

MAX146/MAX147
+2.7V, Low-Power, 8-Channel,
Serial 12-Bit ADCs
______________________________________________________________________________________ 19
Lowest Power at Higher Throughputs
Figure 14b shows the power consumption with
external-reference compensation in fast power-down,
with one and eight channels converted. The external
4.7µF compensation requires a 200µs wait after
power-up with one dummy conversion. This graph
shows fast multi-channel conversion with the lowest
power consumption possible. Full power-down mode
may provide increased power savings in applications
where the MAX146/MAX147 are inactive for long peri-
ods of time, but where intermittent bursts of high-speed
conversions are required.
Internal and External References
The MAX146 can be used with an internal or external
reference voltage, whereas an external reference is
required for the MAX147. An external reference can be
connected directly at VREF or at the REFADJ pin.
An internal buffer is designed to provide 2.5V at
VREF for both the MAX146 and the MAX147. The
MAX146’s internally trimmed 1.21V reference is buf-
fered with a 2.06 gain. The MAX147’s REFADJ pin is
also buffered with a 2.00 gain to scale an external 1.25V
reference at REFADJ to 2.5V at VREF.
Internal Reference (MAX146)
The MAX146’s full-scale range with the internal refer-
ence is 2.5V with unipolar inputs and ±1.25V with bipo-
lar inputs. The internal reference voltage is adjustable
to ±1.5% with the circuit in Figure 16.
External Reference
With both the MAX146 and MAX147, an external refer-
ence can be placed at either the input (REFADJ) or the
output (VREF) of the internal reference-buffer amplifier.
The REFADJ input impedance is typically 20kΩ for the
MAX146, and higher than 100kΩ for the MAX147. At
100
DIN
REFADJ
VREF
1.21V
0V
2.50V
0V
101 1 11100 101
FULLPD FASTPD NOPD FULLPD FASTPD
9ms WAIT
COMPLETE CONVERSION SEQUENCE
t
BUFFER
≈ 200µs
τ = RC = 20kΩ x C
REFADJ
(ZEROS)
CH1 CH7
(ZEROS)
Figure 15. MAX146 FULLPD/FASTPD Power-Up Sequence
+3.3V
510kΩ
24kΩ
100kΩ
0.047µF
12
REFADJ
MAX146
Figure 16. MAX146 Reference-Adjust Circuit
PD1 PD0 DEVICE MODE
0 0 Full Power-Down
0 1 Fast Power-Down
1 0 Internal Clock
1 1 External Clock
Table 5. Software Power-Down and
Clock Mode
Table 6. Hard-Wired Power-Down and
Internal Clock Frequency
SHDN
STATE
DEVICE
MODE
REFERENCE
BUFFER
COMPENSATION
INTERNAL
CLOCK
FREQUENCY
1 Enabled Internal 225kHz
Floating Enabled External 1.8MHz
0 Power-Down N/A N/A