Datasheet

MAX146/MAX147
+2.7V, Low-Power, 8-Channel,
Serial 12-Bit ADCs
18 ______________________________________________________________________________________
Figure 13. Average Supply Current vs. Conversion Rate with
External Reference
1000
10,000
0.1
0.1
AVERAGE SUPPLY CURRENT
vs. CONVERSION RATE
WITH EXTERNAL REFERENCE
100
10
1
CONVERSION RATE (Hz)
AVERAGE SUPPLY CURRENT (µA)
1 10010 1k 10k 1M100k
MAX146/47-13
VREF = V
DD
= 3.0V
R
LOAD
= ∞
CODE = 101010100000
1 CHANNEL
8 CHANNELS
Figure 14b. MAX146 Supply Current vs. Conversion Rate,
FASTPD
10,000
1
0.1 1
AVERAGE SUPPLY CURRENT
vs. CONVERSION RATE
(USING FASTPD)
1000
100
10
CONVERSION RATE (Hz)
AVERAGE SUPPLY CURRENT (µA)
100 1M10 1k 10k 100k
MAX146/47-Fig14b
R
LOAD
= ∞
CODE = 101010100000
8 CHANNELS
1 CHANNEL
Figure 14a. MAX146 Supply Current vs. Conversion Rate,
FULLPD
100
1
0.01 0.1 1
AVERAGE SUPPLY CURRENT
vs. CONVERSION RATE
(USING FULLPD)
10
CONVERSION RATE (Hz)
AVERAGE SUPPLY CURRENT (µA)
10010 1k
MAX146/47-Fig14a
R
LOAD
= ∞
CODE = 101010100000
8 CHANNELS
1 CHANNEL
Figure 14c. Typical Reference-Buffer Power-Up Delay vs. Time
in Shutdown
2.0
0
0.001 0.01 0.1 1 10
TYPICAL REFERENCE-BUFFER POWER-UP
DELAY vs. TIME IN SHUTDOWN
1.5
1.0
0.5
TIME IN SHUTDOWN (s)
POWER-UP DELAY (ms)
MAX146/47-Fig14c
Power-Down Sequencing
The MAX146/MAX147 auto power-down modes can
save considerable power when operating at less than
maximum sample rates. Figures 13, 14a, and 14b show
the average supply current as a function of the sam-
pling rate. The following discussion illustrates the vari-
ous power-down sequences.
Lowest Power at up to 500
Conversions/Channel/Second
The following examples show two different power-down
sequences. Other combinations of clock rates, compen-
sation modes, and power-down modes may give lowest
power consumption in other applications.
Figure 14a depicts the MAX146 power consumption for
one or eight channel conversions utilizing full power-
down mode and internal-reference compensation. A
0.047µF bypass capacitor at REFADJ forms an RC filter
with the internal 20kΩ reference resistor with a 0.9ms
time constant. To achieve full 12-bit accuracy, 10 time
constants or 9ms are required after power-up. Waiting
this 9ms in FASTPD mode instead of in full power-up
can reduce power consumption by a factor of 10 or
more. This is achieved by using the sequence shown in
Figure 15.