Datasheet

4 Maxim Integrated
+5.0V, ±30kV ESD-Protected, Fail-Safe,
Hot-Swap, RS-485/RS-422 Transceiver
MAX14780E
Note 1: All currents into the device are positive. All currents out of the device are negative. All voltages are referred to device
ground, unless otherwise noted.
Note 2: ΔV
OD
and ΔV
OC
are the changes in V
OD
and V
OC
, respectively, when the DI input changes state.
Note 3: The short-circuit output current applies to peak current just prior to foldback current limiting. The short-circuit foldback
output current applies during current limiting to allow a recovery from bus contention.
RECEIVER SWITCHING CHARACTERISTICS WITH INTERNAL SRL (500kbps)
(V
CC
= +5.0V ±10%, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +5.0V and T
A
= +25NC.) (Note 1)
Test Circuits and Waveforms
Figure 1. Driver DC Test Load
Figure 2. Driver Timing Test Circuit
Figure 3. Driver Propagation Delays
B
A
V
OD
V
OC
R
L
/2
R
L
/2
DI
DE
V
CC
A
B
V
OD
R
L C
L
DI
V
CC
0
Z
Y
V
O
0
-V
O
V
O
V
CC
/2
t
DPLH
t
DPHL
1/2 V
O
10%
t
R
90%
90%
1/2 V
O
10%
t
F
V
DIFF
= V (B) - V (A)
V
DIFF
t
SKEW
= | t
DPLH
- t
DPHL
|
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Receiver Propagation Delay
t
RPLH
C
L
= 15pF, Figures 6 and 7
200
ns
t
RPHL
200
Receiver Output Skew
|t
RPLH
- t
RPHL
|
t
RSKEW
C
L
= 15pF, Figures 6 and 7 30 ns
Maximum Data Rate 500 kbps
Receiver Enable to Output Low t
RZL
Figure 8 50 ns
Receiver Enable to Output High t
RZH
Figure 8 50 ns
Receiver Disable Time from Low t
RLZ
Figure 8 50 ns
Receiver Disable Time from High t
RHZ
Figure 8 50 ns
Receiver Enable from Shutdown
to Output High
t
RZH(SHDN)
Figure 8 5500 ns
Receiver Enable from Shutdown
to Output Low
t
RZL(SHDN)
Figure 8 5500 ns
Time to Shutdown t
SHDN
50 340 700 ns