Datasheet

PIN NAME FUNCTION
1 A1 Terminal A of Switch 1
2 B1 Terminal B of Switch 1
3 EN1
Enable Input of Switch 1. When EN1 is driven high, the switch’s state (NO/NC) changes (see Table 1, Table 2, and
Table 3).
4 V
SS
Negative Supply Voltage. Bypass V
SS
to GND with a 1µF ceramic capacitor (100V rated) as close as
possible to the pin.
5 GND Ground
6 EN4
Enable Input of Switch 4. When EN4 is driven high, the switch’s state (NO/NC) changes (see Table 1, Table 2, and
Table 3).
7 B4 Terminal B of Switch 4
8 A4 Terminal A of Switch 4
9 A3 Terminal A of Switch 3
10 B3 Terminal B of Switch 3
11 EN3
Enable Input of Switch 3. When EN3 is driven high, the switch’s state (NO/NC) changes (see see Table 1, Table 2,
and Table 3).
12 V
L
Logic Supply Voltage. Bypass V
L
to GND with a 1µF ceramic capacitor as close as possible to the pin.
13 V
DD
Positive Supply Voltage. Bypass V
DD
to GND with a 1µF ceramic capacitor (100V rated) as close as
possible to the pin.
14 EN2
Enable Input of Switch 2. When EN2 is driven high, the switch’s state (NO/NC) changes (see see Table 1, Table 2,
and Table 3).
15 B2 Terminal B of Switch 2
16 A2 Terminal A of Switch 2
+
TSSOP
134
V
DD
V
SS
143 EN2EN1
TOP VIEW
152 B2B1
161 A2A1
107 B3B4
116 EN3EN4
98 A3A4
125
V
L
GND
MAX14756
MAX14757
MAX14758
MAX14756/MAX14757/
MAX14758
Quad SPST +70V Analog Switches
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Pin Description
Pin Conguration