Datasheet

315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
Typical Application Circuit
28
C13
L1
C11
IF V
DD
IS
3.0V TO 3.6V
4.5V TO 5.5V
THEN V
DD3
IS
CONNECTED TO V
DD
CREATED BY LDO,
AVAILABLE AT AVDD
(PIN 2)
C1
C2
L2
L3
C3
C4
V
DD3
RF INPUT
V
DD3
V
DD
C12
X1
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MAX1473
DVDD
IF FILTER
COMPONENT VALUES
IN TABLE 2
Y1
GND
IN OUT
DGND
MIXOUT
IRSEL
AGND
MIXIN2
MIXIN1
AVDD
LNAOUT
C9
** SEE MIXER SECTION * SEE PHASE-LOCKED LOOP SECTION
C10
AGND
LNASRC
LNAIN
AVDD
XTAL1 XTAL2
TO/FROM µP
POWER DOWN
DATA OUT
PWRDN
PDOUT
DATAOUT
V
DD5
DSP
AGCDIS
DFFB
C8
R1
R2
R3
C7
C6C5
OPP
DSN
DFO
IFIN2
IFIN1
XTALSEL
C15
(SEE TABLE)
C14
**
*
FROM µP
Chip Information
PROCESS: CMOS
MAX1473
14
Maxim Integrated