Datasheet

Table 37. Module Registers Summary
MAX1464 Low-Power, Low-Noise Multichannel
Sensor Signal Processor
www.maximintegrated.com
Maxim Integrated │ 41
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register 00h ADC_Control
X X X X SE[3] SE[2] SE[1] SE[0] X X X X X CNVT1 CNVT2 CNVTT
Register 01h ADC_Data_1 (for Channel Input 1, Uncompensated, and Read-Only Register)
MSB LSB
Register 02h ADC_Cong_1A (for Channel 1)
PGA1[4] PGA1[3] PGA1[2] PGA1[1] PGA1[0] CLK1[2] CLK1[1] CLK1[0] X RES1[2] RES1[1] RES1[0] CO1[3] CO1[2] CO1[1] CO1[0]
Register 03h ADC_Cong_1B (for Channel 1)
X X X X X X X X X BIAS1[2] BIAS1[1] BIAS1[0] X X REF1[1] REF1[0]
Register 04h ADC_Data_2 (for Channel Input 1, Uncompensated, and Read-Only Register)
MSB LSB
Register 05h ADC_Cong_2A (for Channel 2A)
PGA2[4] PGA2[3] PGA2[2] PGA2[1] PGA2[0] CLK2[2] CLK2[1] CLK2[0] X RES2[2] RES2[1] RES2[0] CO2[3] CO2[2] CO2[1] CO2[0]
Register 06h ADC_Cong_2B (for Channel 2B)
X X X X X X X X X BIAS2[2] BIAS2[1] BIAS2[0] X X REF2[1] REF2[0]
Register 07h ADC Data_T (for Internal Temperature Input, Uncompensated, and Read-Only Register)
MSB LSB
Register 08h ADC_Cong_TA (for Internal Temperature Input TA)
PGAT[4] PGAT[3] PGAT[2] PGAT[1] PGAT[0] CLKT[2] CLKT[1] CLKT[0] X REST[2] REST[1] REST[0] COT[3] COT[2] COT[1] COT[0]
Register 09h ADC_Cong_TB (for Internal Temperature Input TB)
X X X X X X X X X BIAST[2] BIAST[1] BIAST[0] X X X X
Register 10h DOP1 Data (for DAC/PWM 1)
MSB LSB
Register 11h DOP1 Control (for DAC/PWM 1)
X X X X X X X X X X X ENPWM1 X X X ENDAC1
Register 12h DOP1 Conguration (for DAC/PWM 1)
X X X X X X X SELPWM1 X X X SELDAC1 X X X SELREF1
Register 13h DOP2 Data (for DAC/PWM 2)
MSB LSB
Register 14h DOP2 Control (for DAC/PWM 2)
X X X X X X X X X X X ENPWM2 X X X ENDAC2
Register 15h DOP2 Conguration (for DAC/PWM 2)
X X X X X X X SELPWM2 X X X SELDAC2 X X X SELREF2
Register 20h Timer Control
TMDN TMEN X X X X X X X X X X X X X ENAHALT
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register 21h Timer Conguration
PS[3] PS[2] PS[1] PS[0] TO[11] TO[10] TO[9] TO[8] TO[7] TO[6] TO[5] TO[4] TO[3] TO[2] TO[1] TO[1]
Register 30h OP AMP Conguration
X X X X X X X X X X X X X X BUF1_LG BUF1_SM
Register 31h Power-On Control
X X X X X X X PWRA2D X X PWRDAC2 PWRDAC1 X X PWROP2 PWROP1
Register 32h Oscillator Control
X X X OSC[4] OSC[3] OSC[2] OSC[1] OSC[0] X X X X X X X ENCKOUT
Register 40h GPIO1 Control
X X X X X X X X X X OUT1 EN1 IN1 CLR1 INV1 EDGE1
Register 41h GPIO2 Control
X X X X X X X X X X OUT2 EN2 IN2 CLR2 INV2 EDGE2