Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsLinear ICsMAX1464AAI+

General Description

The MAX1464 is a highly integrated, low-power, low-noise

multichannel sensor signal processor optimized for indus-

trial, and process-control applications such as pressure

sensing and compensation, RTD and thermocouple lin-

earization, weight sensing and classification, and remote

process monitoring with limit indication.

The MAX1464 accepts sensors with either single-ended

or differential outputs. The MAX1464 accommodates sen-

sor output sensitivities from 1mV/V to 1V/V. The MAX1464

provides amplification, calibration, signal linearization,

and temperature compensation that enable an overall

performance approaching the inherent repeatability of the

sensor without requiring any external trim components.

Two 16-bit voltage-output DACs and two 12-bit PWMs can

be used to indicate each of the temperature-compensated

sensor signals independently, as a sum or difference

signal, or user-defined relationship between each signal

and temperature. Uncommitted op amps are available to

buffer the DAC outputs, drive heavier external loads, or

provide additional gain and filtering.

The MAX1464 incorporates a 16-bit CPU, user-pro-

grammable 4kB of FLASH program memory, 128 bytes

of FLASH user information, one 16-bit ADC, two 16-bit

DACs, two 12-bit PWM digital outputs, four rail-to-rail op

amps, one SPI™-compatible interface, two GPIOs, and

one on-chip temperature sensor.

The MAX1464 operates from a single 5.0V (typ) supply

and is packaged for automotive, industrial, and commer-

cial temperature ranges in a 28-pin SSOP package.

Applications

● Pressure Sensor Signal Conditioning

● Weight Measurement Systems

● Thermocouple and RTD Linearization

● Transducers and Transmitters

● Process Indicators

● Calibrators and Controllers

● GMR and MR Magnetic Direction Sensors

Features

● Programmable Amplification, Calibration,

Linearization, and Temperature Compensation

● Two Differential or Four Single-Ended ADC Input

Channels

● Accommodates Sensor Output Sensitivities from

1mV/V to 1V/V

● Two DAC/PWM Output Signal Channels

● Supports 4–20mA Current Loop Applications

● 4kB of FLASH Memory for Code and Coefficients

● 128 Bytes of FLASH Memory for User Information

● Integrated Temperature Sensing

● Flexible Dual Op-Amp Block

● Programmable Sensor Input Gain and Offset

● Programmable Sensor Sampling Rate and Resolution

● No External Trim Components Required

Functional Diagram and Detailed Block Diagram appear at

end of data sheet.

19-3579; Rev 1; 9/14

*Dice are tested at T

= +25°C, DC parameters only.

SPI is a trademark of Motorola, Inc.

OUT2SM

AMP2M

AMP2P

OUT2LG

REF

INP1

DDF

INM1

INP2

INM2

SSF

GPIO2

GPIO1

SCLK

CKIO

CKSEL

N.C.

OUT1LG

AMP1P

AMP1M

OUT1SM

SSOP

TOP VIEW

MAX1464

MAX1464 Low-Power, Low-Noise Multichannel

Sensor Signal Processor

PART TEMP RANGE PIN-PACKAGE

MAX1464CAI 0°C to +70°C 28 SSOP

MAX1464C/W* 0°C to +70°C Die

MAX1464EAI -40°C to +85°C 28 SSOP

MAX1464AAI -40°C to +125°C 28 SSOP

Ordering Information

EVALUATION KIT AVAILABLE

Summary of content (47 pages)

PAGE 1
EVALUATION KIT AVAILABLE MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor General Description Features The MAX1464 is a highly integrated, low-power, low-noise multichannel sensor signal processor optimized for industrial, and process-control applications such as pressure sensing and compensation, RTD and thermocouple linearization, weight sensing and classification, and remote process monitoring with limit indication.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Absolute Maximum Ratings VDD to VSS............................................................-0.3V to +6.0V VDDF to VSS.........................................................-0.3V to +6.0V VSSF to VSS..........................................................-0.3V to +0.3V All Other Pins to VSS..................................-0.3V to (VDD + 0.3V) Continuous Power Dissipation (TA = +70°C) 28-Pin SSOP (derate 9.1mW/°C above +70°C) ......
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Electrical Characteristics (continued) (VDDF = VDD = 4.5V to 5.5V, VSSF = VSS = 0V, fCLK = 4.0MHz, TA = TMIN to TMAX. Typical values are at VDDF = VDD = 5.0V, VSSF = VSS = 0V, TA = +25°C, unless otherwise noted.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Electrical Characteristics (continued) (VDDF = VDD = 4.5V to 5.5V, VSSF = VSS = 0V, fCLK = 4.0MHz, TA = TMIN to TMAX. Typical values are at VDDF = VDD = 5.0V, VSSF = VSS = 0V, TA = +25°C, unless otherwise noted.
PAGE 5
MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Electrical Characteristics (continued) (VDDF = VDD = 4.5V to 5.5V, VSSF = VSS = 0V, fCLK = 4.0MHz, TA = TMIN to TMAX. Typical values are at VDDF = VDD = 5.0V, VSSF = VSS = 0V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VOS_LG 0 ±6 mV IB_LG ±225 nA LARGE OP AMP Input Offset Voltage Input Bias Current DC Gain AVOL_LG OUTnLG = 0.5V to 4.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Electrical Characteristics (continued) (VDDF = VDD = 4.5V to 5.5V, VSSF = VSS = 0V, fCLK = 4.0MHz, TA = TMIN to TMAX. Typical values are at VDDF = VDD = 5.0V, VSSF = VSS = 0V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL Bit Weight Offset Error CONDITIONS MIN BWPWM VPWM_OS PWM data = 0000h Gain Error GEPWM Output Jitter OJPWM (Note 7) TYP MAX UNITS 2 µs/LSB ±1 µs ±0.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Electrical Characteristics (continued) (VDDF = VDD = 4.5V to 5.5V, VSSF = VSS = 0V, fCLK = 4.0MHz, TA = TMIN to TMAX. Typical values are at VDDF = VDD = 5.0V, VSSF = VSS = 0V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS DIGITAL INPUTS (GPIO1, GPIO2, SCLK, DI, CKSEL, CKIO, CS) Input High Threshold Voltage VIH Input Low Threshold Voltage VIL Input Hysteresis MIN TYP 0.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Timing Characteristics (VDDF = VDD = 4.5V to 5.5V, VSSF = VSS = 0V, fCLK = 4.0MHz, TA = TMIN to TMAX. Typical values are at VDDF = VDD = 5.0V, VSSF = VSS = 0V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER Programming Temperature SYMBOL CONDITIONS MIN TYP TPROG Internal Oscillator Clock Frequency fICLK OSC[4:0] = 00000 External Clock Frequency fECLK VCKSEL = 0 3.3 4.15 Min 0.2 Max 5 MAX UNITS 125 °C 5.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor tCS CS tCSI tCSS tSC tCL tCH tCSS tSC tCSH tCL tCH tCSH SCLK tDS tDS tDH tDH DI tDV tDO tTR tDV tDO tTR DO Figure 1. Serial Interface Timing Diagram Typical Operating Characteristics (VADD = 5.0V, TA = +25°C, unless otherwise noted.) 2.35 TA = -40°C 2.30 2.25 4.5 0.81 BASE OPERATING CURRENT, IBO (mA) CPU ON 2% OF TIME ADC ON 98% OF TIME ADCCLK = 1MHz DAC1 ON SMALL OP AMP ON 4.7 4.9 5.1 5.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Typical Operating Characteristics (continued) (VADD = 5.0V, TA = +25°C, unless otherwise noted.) -1 -2 -3 -4 PGA[4:0] = 01000 -1.0 -0.5 0 0.5 0.01 0 -0.01 -0.02 INPUT VOLTAGE NORMALIZED TO FULL SCALE -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 -3 0.8 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 INPUT VOLTAGE NORMALIZED TO FULL SCALE DAC RATIOMETRICITY ERROR vs. SUPPLY VOLTAGE 0.05 MAX1464 toc10 2 DAC INPUT = 5555CH (4.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Pin Description PIN NAME 1 OUT1SM FUNCTION 2 AMP1M Op Amp 1 Negative Input 3 AMP1P Op Amp 1 Positive Input 4 OUT1LG Large Op Amp 1 Output 5, 7 N.C. No Connection 6 VDD Positive Supply Voltage Input. Bypass VDD to VSS with a 0.1µF ceramic capacitor. 8 CKSEL Clock-Select Digital Input Clock Digital Input/Output Small Op Amp 1 Output 9 CKIO 10 CS SPI Chip-Select Digital Input. Active low.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor 5VDC 22Ω VDD VDDF OUTnSM INPn OUT MAX1464 SENSOR 0.1µF INMn 0.1µF 100pF VSS GND Figure 2. Basic Bridge Sensor Ratiometric Output Configuration Typical Application Circuit Analog ratiometric output configuration (Figure 2) provides an output that is proportional to the power-supply voltage. Ratiometricity is an important consideration for battery-operated instruments, and some industrial applications.
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There are two output modules in the MAX1464—DOP1 (DAC Op Amp PWM 1) and DOP2 (DAC Op Amp PWM 2). Each of the DOP modules contains a 16-bit DAC, a 12-bit digital PWM converter, a small op amp, and a large op amp with high-output-drive capability. Each module can be configured in several different modes to suit a wide range of output signal requirements. Either the DAC or the PWM can be selected as the primary output signal.
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MAX1464 step mode of code execution to ease code writing and debugging. A special program instruction sequence is required to observe the other CPU registers. Table 1 lists the CPU registers. CPU Ports The MAX1464 incorporates 16 CPU ports that are directly accessible by the serial interface. All the CPU ports have a 16-bit data word width. The contents of the ports can be read and written by transferring data to and from the accumulator register (A) using the RDX and WRX instructions.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor VDD 2 x VREF 4 x VBG REF CO DAC VBG INP1 INM1 INP2 INM2 M U X PGA VSS NO. TEMPERATURE SENSOR ADC 00h ADC_Control 01h ADC_Data_1 02h ADC_Config_1A 03h ADC_Config_1B 04h ADC_Data_2 05h ADC_Config_2A 06h ADC_Config_2B 07h ADC_Data_T 08h ADC_Config_TA 09h ADC_Config_TB SINGLE-ENDED 1 VBG 2 OUTnSM 3 OUTnLG 4 VDD 5 VSS 6 DACnOUT VIA OUTnSM 7 DACnOUT VIA OUTnLG 8 INPn 9 INMn Figure 4.
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MAX1464 Coarse-Input Offset Adjustment Differential input signals that have an offset can be partially nulled by the input coarse-offset (CO) DAC. An offset voltage is added to the input signal prior to gaining the signal. This allows a maximum gain to be applied to the differential input signal without saturating the conversion channel. The CO signal added to the differential signal is a percentage of the full-scale ADC reference voltage as referred to the ADC inputs.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor VDD SW0 2 x VREF SW10 SM OUTnSM SW3 SW1 REF DAC SW2 SW4 AMPnM AMPnP SW6 OUTnLG DOPn_Data 11h OR 14h DOPn_Control 12h OR 15h DOPn_Config 30h OpAmp_Config SW8 SW7 LG SW11 10h OR 13h PWM SW9 SW5 Figure 5. DOP1 and DOP2 Modules unity-gain buffer configuration is automatically selected, and it provides the DAC output signal directly to the device pin OUTnLG.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Every function of the DOP module can be selected individually (DAC, PWM, or op amp), or two out of the three functions of the DOP module can be selected at the same time (PWM and op amp, or DAC and PWM, or DAC and op amp), as there are only two output pins for the module, OUTnSM and OUTnLG. The various configuration options for the DOP are shown in Table 21.
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MAX1464 GPIOn_Control Low-Power, Low-Noise Multichannel Sensor Signal Processor 40h OR 41h EDGE OR LEVEL DETECT GPIOn 100kΩ TRI-STATE BUFFER VSS Figure 7. GPIO1 and GPIO2 Modules and write accessible by the serial inter-face for programming of instruction code and calibration coefficients. The MAX1464 serial interface can operate in 4-wire SPI-compatible mode or in a 3-wire mode (default on power-up). In 3-wire mode, the DI and DO lines can be connected together, forming a bidirectional data line.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor CS SCLK IRS0 IRSA0 DI IRS1 IRSA1 IRS2 IRSA2 IRS3 IRSA3 IRS4 IRSD0 IRS5 IRSD1 IRS6 IRSD2 IRS7 IRSD3 Figure 8.
PAGE 21
MAX1464 1) Low-Power, Low-Noise Multichannel Sensor Signal Processor Halt the CPU: 9) 78 2) If partition 1 is to be modified, enter the following command: F8 Otherwise, partition 0 is selected.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Program and Coefficient Memory The program and coefficient memory, FLASH partition 0, is addressed by the CPU and by the serial interface sequentially from 0000h (0 dec) to 0FFFh (4095 dec). Program execution by the CPU always begins at address 0000h and proceeds toward 0FFFh in 1-byte increments. Although both the CPU and the serial interface can address a 16-bit field, the FLASH size only uses 12 bits.
PAGE 23
MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Description: Perform a 16-bit logical AND operation, bit for bit, on the contents of the A-register and the contents of the Xregister. Store the 16-bit result back into the A-register. The previous contents of the A-register are overwritten and lost. Register X can be any of the 16 CPU registers. PC is incremented once to point to the next instruction in program memory. Two’s-complement data format is not preserved. No branching occurs.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Description: INX Increment Register X Perform a 16-bit shift-left operation on the contents of X-register. The most significant bit, bit 15, is truncated and lost. If register X is any CPU register other than register R6, then a zero is appended into the LSB, bit 0. If X is CPU register R6, then the data appended into the LSB bit 0 is copied from the MSB of register R4. The contents of register R4 are not affected.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor PC-register ← PC-register + 1 (point to next instruction) CPU Cycles required: 1 cycle The next instruction to execute is fetched from the program memory byte pointed to by the new contents of the PC-register. The previous contents of the PC-register are overwritten and lost. Two’s-complement data format is preserved. Description: Perform a 16-bit logical NOT operation on the contents of the X-register.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor CPU Cycles required: 1 cycle Description: MLT Multiply Op-code: 1111 0011BINARY F3h Operation: Perform a 16-bit move operation from port-X to the Aregister. The port-X contents are unchanged. The previous contents of A-register are overwritten and lost. The port-X can be any of the CPU ports. PC is incremented once to point to the next instruction in program memory. Two’s-complement data format is preserved. No branching occurs.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 1. CPU Registers ADDRESS REF ALT NAME FUNCTION 0h R0 P Pointer Register. This register contains the address of the instruction or data in FLASH memory to be fetched. 1h R1 A Accumulator Register. This register generally contains the result of any operation involving two or more registers. It is the accumulator for the multiregister operation result and can be used effectively to carry data from one computation to the next.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 2. CPU Ports ADDRESS REF FUNCTION 0h–Ch P0–PC General-Purpose Ports. These ports, P0–PC, can be used to hold intermediate calculation results, often-used calculation coefficients, loop counter values, event counter values, comparison limit values, etc. PD Module Data Port. This port is used to transfer data to and from the various functional modules in the MAX1464.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 3. Module Registers MODULE NAME ADC REGISTER NAME ADDRESS ADC_Control 00h Initiate conversions and select ADC input. ADC_Data_1 01h Result of ADC conversion on channel 1 input. DESCRIPTION R/W R/ W R ADC_Config_1A 02h Settings for channel 1 input and conversion. R/ W ADC_Config_1B 03h Settings for channel 1 input and conversion. R/ W ADC_Data_2 04h Result of ADC conversion on channel 2 input.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 5. ADC_Control (Address = 00h) BITS NAME 15–12 — DESCRIPTION 11–8 SE[3:0] 7–3 — 2 CNVT1 1 = Initiate conversion on channel 1 using ADC settings specified in registers ADC_Config_1A and ADC_Config_1B. The ADC result is stored in ADC_Data_1. CPU is halted during the conversion process. This bit is automatically reset to zero when conversion is completed.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 7. Single-Ended (SE[3:0]) SE[3:0] PGA RANGE (V/V) ADC +INPUT ADC -INPUT 0001 0.99 VBG VSS Bandgap voltage. 0010 0.99 to 244 OUTnSM VSS Output of small op-amp n. DESCRIPTION 0011 0.99 to 244 OUTnLG VSS Output of large op-amp n. 0100 0.7* VDD** VSS Power-supply voltage. 0101 0.7* VSS VSS Power-supply ground. 0110 0.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 11. ADC_Config_2B (Address = 06h) BIT NAME 15–7 — 6–4 BIAS2[2:0] 3–2 — 1–0 REF2[1:0] DESCRIPTION Unused. ADC bias setting to use during conversion of channel 2. BIAS2[2] = MSB. Unused. Reference select for conversion on channel 2. REF2[2] = MSB. Table 12. ADC_Config_TA (Address = 08h) BITS NAME 15–11 PGAT[4:0] Programmable gain to use during conversion of temperature sensor. PGAT[4] = MSB.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 16. ADC Resolution (RESn[2:0], Where n = 1, 2, or T) RESn[2:0] RESOLUTION (BITS) NO. OF fADC CLOCKS PER CONVERSION 000 9 256 001 10 320 010 12 011 13 100 101 110 Table 17. ADC Conversion Time (RESn[2:0] and CLKn[2:0], Where n = 1, 2, or T) RESOLUTION (BITS) CONVERSION TIME (ms) CLKn[2:0] = 000 CLKn[2:0] = 100 CLKn[2:0] = 111 9 0.256 4.096 32.768 512 10 0.320 5.120 40.960 640 12 0.512 8.192 65.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 19. ADC Bias Current (BIASn[2:0], Where n = 1, 2, or T) BIASn[2:0] MAXIMUM FRACTION OF ADC CLOCK FULL BIAS FREQUENCY CURRENT (Hz) CLKn[2:0] 000 1/8 125k 011 001 2/8 250k 011 010 3/8 250k 010 011 4/8 500k 010 100 5/8 500k 001 101 6/8 500k 001 110 7/8 1M 000 111 8/8 1M 000 Table 20.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 21. DOPn Configuration Options DOP CONFIGURATION PWRDAC PWROP ENDAC ENPWM BUF DAC OFF, PWM OFF, op amp OFF. 0 0 X X 0 0 X DAC OFF, PWM OFF, op amp ON. AMPnP and AMPnM routed to LG op amp. 0 1 0 X 0 0 0 DAC OFF, PWM OFF, op amp ON. LG op amp configured as unity-gain buffer. 0 1 0 X 0 0 1 DAC OFF, PWM OFF, op amp ON. AMPnP and AMPnM routed to SM op amp. 0 1 1 X 0 0 0 DAC OFF, PWM OFF, op amp ON.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 22. DOP Module Registers NAME ADDRESS DESCRIPTION POR VALUE DOP1_Data 10h DAC1/PWM1 input data. 0000 DOP1_Control 11h Initiate DAC1 and/or PWM1 conversions. 0000 DOP1_Config 12h DAC1/PWM1 output and DAC 1 reference selection. 0000 DOP2_Data 13h DAC2/PWM2 input data. 0000 DOP2_Control 14h Initiate DAC2 and/or PWM2 conversions. 0000 DOP2_Config 15h DAC2/PWM2 output and DAC 2 reference selection.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 26. DOP2_Config (Address = 15h) BIT NAME 15–9 — 8 SELPWM2 7–5 — 4 SELDAC2 3–1 — 0 SELREF2 DESCRIPTION Unused. Select PWM2 output: 1 = OUT2LG, 0 = OUT2SM. Unused. Select DAC2 output: 1 = OUT2LG (large op-amp buffer), 0 = OUT2SM (small op-amp buffer). Unused. Select voltage reference for DAC2: 0 = VDD, 1 = 2 x VREF. Table 27.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 28. GPIO1_Control (Address = 40h) BITS NAME 15–6 — DESCRIPTION 5 OUT1 4 EN1 Enable the output driver; 1 = enabled, 0 = disabled, and OUT tri-stated. 3 IN1 When EDGE1 = 0: The value input on GPIO1 is clocked into this bit (Notes 14, 15). When EDGE1 = 1: An edge detection on GPIO1 causes a 1 to be clocked into this bit. 2 CLR1 Clear IN1 bit; 1 = clear IN1 to 0, 0 = IN1 retains its status (Note 16).
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 32. Timer Prescaler Settings (PS[3:0]) PS[3:1] PS[0] PRESCALER N 000 0 1 001 0 2 010 0 4 011 0 8 100 0 16 101 0 32 110 0 64 111 0 128 000 1 3 001 1 6 010 1 12 011 1 24 100 1 48 101 1 96 110 1 192 111 1 384 Table 33. Power-On Control (Address = 31h) BITS NAME DESCRIPTION 15–9 — 8 PWRA2D Unused. 7–6 — 5 PWRDAC2 Power for DAC2 in DOP2: 1 = power enabled, 0 = disabled.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 34. Oscillator Control (Address = 32h) BITS NAME 15–13 — 12–8 OSC[4:0] 7–6 — Unused. 5–4 — Reserved 0. 3–1 — Unused. 0 DESCRIPTION Unused. Oscillator trim setting. OSC[4] = MSB. Enable clock output: 1 = enable ENCKOUT internal clock output on CKIO based on CKSEL inputs, 0 = disable. Table 35.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 37.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 38. Internal Register Set Address (IRSA) Decoding IRSA[3:0] REGISTER NIBBLE ADDRESSED 0000 DHR[3:0] Write IRSD[3:0] to DHR[3:0]. 0001 DHR[7:4] Write IRSD[3:0] to DHR[7:4]. 0010 DHR[11:8] Write IRSD[3:0] to DHR[11:8]. 0011 DHR[15:12] 0100 PFAR[3:0] Write IRSD[3:0] to PFAR[3:0]. 0101 PFAR[7:4] Write IRSD[3:0] to PFAR[7:4]. 0110 PFAR[11:8] Write IRSD[3:0] to PFAR[11:8]. DESCRIPTION Write IRSD[3:0] to DHR[15:12].
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 40. Interface Mode Register (IMR) Decoding IRSD DESCRIPTION 0000 Place the MAX1464 into a 4-wire serial interface (DI cannot be connected to DO). 0001 Place the MAX1464 into a 3-wire serial interface (DI can be externally connected to DO). 0010–1111 Unused. Table 41. Instruction Set TWO’S COMP NO. OF REGISTERS INVOLVED NO. OF CYCLES NO. OF BYTES Y 1 3 3 Clear X-reg. Y 1 1 1 A-reg = A-reg AND X-reg.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor CS DO DI SCLK Functional Diagram SERIAL INTERFACE VDD INP1 CO DAC INM1 INP2 ∑ MUX 4kB FLASH MEMORY 16-BIT CPU PGA POWERON RESET VDDF VSS VSSF ADC CKIO INM2 DIGITAL I/O TEMP SENSOR DAC 1 PWM 1 DAC 2 PWM 2 TRANSISTOR COUNT: 70,921 (not including FLASH) PROCESS: CMOS SUBSTRATE CONNECTED TO: VSS www.maximintegrated.
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www.maximintegrated.com INM2 INP2 INM1 INP1 TEMPERATURE SENSOR VSS M U X CO DAC VBG OUTnSM OUTnLG VDD VSS DACnOUT VIA OUTnSM DACnOUT VIA OUTnLG INPn INMn 2 3 4 5 6 7 8 9 SINGLE-ENDED PGA 1 NO.
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www.maximintegrated.
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MAX1464 Low-Power, Low-Noise Multichannel Sensor Signal Processor Revision History REVISION NUMBER REVISION DATE 0 9/14 DESCRIPTION Removed automotive references PAGES CHANGED 1, 12 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product.