Datasheet

MAX13442E/MAX13443E/MAX13444E
R1
4.7kΩ
R3
47Ω
C1
2.2nF
C2
2.2nF
R2
4.7kΩ
RO
R
X
T
X
R4
47Ω
J1708 BUS
A
B
TXD
D
R
DE
RE
MAX13444E
V
CC
Figure 14. J1708 Application Circuit (See Tables 2 and 4)
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages
. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
1
2
3
4
8
5
V
CC
GND
TXD
DE
RE
RO
R
D
R
T
R
T
7
6
D
R
DE
RE
TXD
RO
A
B
1
2
3
4
8
7
6
5
V
CC
B
A
GND
TXD
DE
RE
RO
SO SO
R
D
B
A
MAX13444E
+
+
Pin Configurations and Typical Operating Circuits (continued)
±15kV ESD-Protected, ±80V Fault-Protected,
Fail-Safe RS-485/J1708 Transceivers
______________________________________________________________________________________ 17
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 SO S8+4
21-0041 90-0096