Datasheet

RS-485 Transceivers with Low-Voltage
Logic Interface
Pin Description
PIN
MAX13430E/MAX13431E
µMAX TDFN
NAME FUNCTION
11V
L
V
L
Input Logic-Supply Voltage. Bypass V
L
with a 0.1µF ceramic capacitor located as
close as possible to the input.
22RO
Receiver Output. When RE is low and if (A - B) -50mV, RO is high; if (A - B) -200mV,
RO is low.
33DE
Driver Output Enable. Drive DE high to enable driver outputs. These outputs are high
impedance when DE is low. Drive RE high and DE low to enter low-power shutdown
mode. DE is a hot-swap input (see the Hot-Swap Capability section for details.)
44RE
Active-Low Receiver Output Enable. Drive RE low to enable RO; RO is high impedance
when RE is high. Drive RE high and DE low to enter low-power shutdown mode. RE is a
hot-swap input (see the Hot-Swap Capability section for details.)
55DI
D r i ver Inp ut. W i th D E hi g h, a l ow on D I for ces noni nver ti ng outp ut l ow and i nver ti ng outp ut
hi g h. S i m i l ar l y, a hi g h on D I for ces noni nver ti ng outp ut hi g h and i nver ti ng outp ut l ow .
6 6 GND Ground
7 7 N.C. No Connection. Not internally connected. N.C. can be connected to GND.
8 8 A Noninverting Receiver Input and Noninverting Driver Output
9 9 B Inverting Receiver Input and Inverting Driver Output
10 10 V
CC
V
CC
Input Supply Voltage. Bypass V
CC
with a 1µF ceramic capacitor located as close
as possible to the input for full ESD protection. If full ESD protection is not required,
bypass V
CC
with a 0.1µF ceramic capacitor.
EP Exposed Pad (TDFN Only). Connect EP to GND.
MAX13430E–MAX13433E
12
Maxim Integrated