Datasheet
MAX1303
4-Channel, ±V
REF
Multirange Inputs,
Serial 16-Bit ADC
______________________________________________________________________________________ 15
CS
SCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
DIN SC2C1C00000
ANALOG INPUT
TRACK AND HOLD*
HOLD
DOUT
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
BYTE 1 BYTE 2 BYTE 3 BYTE 4
SSTRB
INTCLK**
1
2
3
14
15
16
17
TRACK HOLD
HIGH IMPEDANCE
t
ACQ
100ns to 400ns
f
INTCLK
≈ 4.5MHz
f
SAMPLE
≈ f
SCLK
/32 + f
INTCLK
/17
*TRACK AND HOLD TIMING IS CONTROLLED BY SCLK.
**INTCLK IS AN INTERNAL SIGNAL AND IS NOT ACCESSIBLE TO THE USER.
SAMPLING INSTANT
Figure 2. External Acquisition-Mode Conversion (Mode 1)