Datasheet

MAX1303
4-Channel, ±V
REF
Multirange Inputs,
Serial 16-Bit ADC
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Detailed Description
The MAX1303 multirange, low-power, 16-bit successive-
approximation ADC operates from a single +5V supply and
has a separate digital supply allowing digital interface with
2.7V to 5.25V systems. This 16-bit ADC has internal track-
and-hold (T/H) circuitry that supports single-ended and
fully differential inputs. For single-ended conversions, the
valid analog input voltage range spans from -V
REF
below
ground to +V
REF
above ground. The maximum allowable
differential input voltage spans from -2 x V
REF
to +2 x
V
REF
. Data can be converted in a variety of software-pro-
grammable channel and data-acquisition configurations.
Microprocessor (µP) control is made easy through an
SPI-/QSPI-/MICROWIRE-compatible serial interface.
The MAX1303 has four single-ended analog input chan-
nels or two differential channels. Each analog input chan-
nel is independently software programmable for seven
single-ended input ranges (0V to +V
REF
/2, -V
REF
/2 to 0V,
0V to +V
REF
, -V
REF
to 0V, ±V
REF
/4, ±V
REF
/2, and ±V
REF
)
and three differential input ranges (±V
REF
/2, ±V
REF
, and
±2 x V
REF
). Additionally, all analog input channels are fault
tolerant to ±6V. A fault condition on an idle channel does
not affect the conversion result of other channels.
Power Supplies
To maintain a low-noise environment, the MAX1303 pro-
vides separate power supplies for each section of cir-
cuitry. Table 1 shows the four separate power supplies.
Achieve optimal performance using separate AVDD1,
AVDD2, DVDD, and DVDDO supplies. Alternatively, con-
nect AVDD1, AVDD2, and DVDD together as close to the
device as possible for a convenient power connection.
Connect AGND1, AGND2, AGND3, DGND, and DGNDO
together as close as possible to the device. Bypass
each supply to the corresponding ground using a 0.1µF
capacitor (Table 1). If significant low-frequency noise is
present, add a 10µF capacitor in parallel with the 0.1µF
bypass capacitor.
Converter Operation
The MAX1303 ADC features a fully differential, succes-
sive-approximation register (SAR) conversion tech-
nique and an on-chip T/H block to convert voltage
signals into a 16-bit digital result. Both single-ended
and differential configurations are supported with pro-
grammable unipolar and bipolar signal ranges.
Table 1. MAX1303 Power Supplies and Bypassing
POWER
SUPPLY/GROUND
SUPPLY VOLTAGE
RANGE (V)
TYPICAL SUPPLY
CURRENT (mA)
CIRCUIT SECTION BYPASSING
DVDDO/DGNDO 2.7 to 5.25 0.2 Digital I/O 0.1µF to DGNDO
AVDD2/AGND2 4.75 to 5.25 17.5 Analog Circuitry 0.1µF to AGND2
AVDD1/AGND1 4.75 to 5.25 3.0 Analog Circuitry 0.1µF to AGND1
DVDD/DGND 4.75 to 5.25 0.9
Digital Control Logic and
Memory
0.1µF to DGND
Table 2. Analog Input Configuration Byte
BIT
NUMBER
NAME DESCRIPTION
7 START Start Bit. The first logic 1 after CS goes low defines the beginning of the analog input configuration byte.
6C2
5C1
4C0
Channel-Select Bits. SEL[2:0] select the analog input channel to be configured (Tables 4 and 5).
3 DIF/SGL
Differential or Single-Ended Configuration Bit. DIF/SGL = 0 configures the selected analog input channel
for single-ended operation. DIF/SGL = 1 configures the channel for differential operation. In single-ended
mode, input voltages are measured between the selected input channel and AGND1, as shown in
Table 4. In differential mode, the input voltages are measured between two input channels, as shown in
Table 5. Be aware that changing DIF/SGL adjusts the FSR, as shown in Table 6.
2R2
1R1
0R0
Input-Range-Select Bits. R[2:0] select the input voltage range, as shown in Table 6 and Figure 6.