Datasheet

MAX13030E–MAX13035E
6-Channel High-Speed Logic-Level Translators
_______________________________________________________________________________________ 9
Test Circuits/Timing Diagrams
MAX13030E–
MAX13035E
t
FVCC
t
RVCC
I/O V
L_
(CLK_V
L
*)
I/O V
CC_
(CLK_V
CC
*)
150Ω
V
L
V
L
V
CC
10%
10%
90%
90%
50%
50%
50%
50%
V
CC
C
IOVCC
t
PLH
t
PHL
t
PVL-VCC
= t
PLH
OR t
PHL
V
CC
EN**
V
L
I/O V
CC
I/O V
L
*MAX13035E ONLY
(C
CLK_VCC
*)
**MAX13030E–MAX13034E ONLY
Figure 1. Push-Pull Driving I/O V
L_
Test Circuit and Timing
MAX13030E–
MAX13035E
t
FVCC
t
RVCC
V
L
V
L
V
CC
10%
10%
90%
90%
50%
50%
50%
50%
V
CC
C
IOVCC
I/O V
CC
V
GATE
V
L
V
CC
EN**
V
GATE
I/O V
L_
(CLK_V
L
*)
I/O V
CC_
(CLK_V
CC
*)
*MAX13035E ONLY
**MAX13030E–MAX13034E ONLY
(C
CLK_VCC
*)
t
PLH
t
PHL
t
PVL-VCC
= t
PHL
Figure 2. Open-Drain Driving I/O VL_ Test Circuit and Timing