Datasheet

MAX13030E–MAX13035E
6-Channel High-Speed Logic-Level Translators
10 ______________________________________________________________________________________
Test Circuits/Timing Diagrams (continued)
MAX13030E–
MAX13035E
t
FVL
t
RVL
V
L
V
L
V
CC
10%
10%
90%
90%
50%
50%
50%
50%
V
CC
C
IOVL
I/O V
CC
V
L
V
CC
EN**
150Ω
I/O V
L
I/O V
L_
(CLK_V
L
*)
(C
CLK_VL
*)
I/O V
CC_
(CLK_V
CC
*)
*MAX13035E ONLY
**MAX13030E–MAX13034E ONLY
t
PLH
t
PHL
t
PVCC-VL
= t
PLH
OR t
PHL
Figure 3. Push-Pull Driving I/O V
CC_
Test Circuit and Timing
MAX13030E–
MAX13035E
V
L
V
L
V
CC
10%
10%
90%
90%
50%
50%
50%
50%
V
CC
C
IOVL
I/O V
L
V
L
V
CC
EN**
t
FVL
t
RVL
V
GATE
I/O V
L_
(CLK_V
L
*)
(C
CLK_VL
*)
(C
CLK_VL
*)
I/O V
CC_
(CLK_V
CC
*)
*MAX13035E ONLY
**MAX13030E–MAX13034E ONLY
t
PLH
t
PHL
t
PVCC-VL
= t
PHL
Figure 4. Open-Drain Driving I/O V
CC_
Test Circuit and Timing