Datasheet

NAME FUNCTION

NARROW PDIP SSOP

1, 2 1, 2 V

+5V Supply. Bypass with a 0.1μF capacitor to AGND.

3, 9, 22, 24

4, 7, 8, 11, 22,

24, 25, 28

N.C. No Connection. No internal connection.

4 3 DGND Digital Ground

5 5 SCL Serial Clock Input

6, 8, 10 6, 10, 12 A0, A2, A1 Address Select Inputs

7 9 SDA

Open-Drain Serial Data I/O. Input data is clocked in on the rising edge of

SCL, and output data is clocked out on the falling edge of SCL.

External pullup resistor required.

11 13 SHDN

Shutdown Input. When low, device is in full power-down (FULLPD) mode.

Connect high for normal operation.

12 14 AGND Analog Ground

13–20 15–21, 23 CH0–CH7 Analog Input Channels

21 26 REFADJ

Bandgap Voltage-Reference Output/External Adjust Pin. Bypass with

a 0.01µF capacitor to AGND. Connect to V

when using an external

reference at REF.

23 27 REF

Reference Buffer Output/ADC Reference Input. In internal reference mode,

the reference buffer provides a 4.096V nominal output, externally adjustable

at REFADJ. In external reference mode, disable the internal reference by

pulling REFADJ to V

and applying the external reference to REF.

MAX127/MAX128 Multirange, +5V, 12-Bit DAS with

2-Wire Serial Interface

www.maximintegrated.com

Maxim Integrated

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Pin Description