Datasheet

Figure 3. Pushbutton Reset. The debounced PBRST input
ignores input pulses less than 1ms and is guaranteed to
recognize pulses of 20ms or greater.
Figure 4. Watchdog Strobe Input
Figure 6. Power-Up Slew RateFigure 5. Power-Down Slew Rate
t
RST
t
PBD
t
PB
V
IH
V
IL
PB RST
RST
RST
t
ST
t
TD
ST
NOTE: t
SD
IS THE MAXIMUM ELAPSED TIME BETWEEN ST HIGH-TO-LOW
TRANSITIONS (ST IS ACTIVATED BY FALLING EDGES ONLY) WHICH WILL
KEEP THE WATCHDOG TIMER FROM FORCING THE RESET OUTPUTS
ACTIVE FOR A TIME OF t
RST
. t
TD
IS A FUNCTION OF THE VOLTAGE AT
THE TD PIN, AS TABULATED BELOW.
CONDITION
TD pin = 0V
TD pin = open
TD pin = V
CC
MIN
t
TD
TYP
150ms
250ms
1200ms
MAX
62.5ms
250ms
500ms
250ms
1000ms
2000ms
t
R
V
CC
+4.75V
+4.25V
t
F
V
CC
+4.75V
+4.25V
MAX1232 Microprocessor Monitor
www.maximintegrated.com
Maxim Integrated │ 5