Datasheet

Detailed Description
ADC Operation
The MAX121 uses successive approximation and input
track/hold (T/H) circuitry to convert an analog signal to a
14-bit serial digital output code. The control logic interfac-
es easily to most microprocessors (µPs) and digital signal
processors (DSPs), requiring only a few passive com-
ponents for most applications. The T/H does not require
an external capacitor. Figure 1 shows the MAX121 in its
simplest operational configuration.
Analog Input Track/Hold
The Equivalent Input Circuit (Figure 2) illustrates the
sampling architecture of the ADC’s analog comparator.
An internal buffer charges the hold capacitor to minimize
the required acquisition time between conversions. The
analog input appears as a 6kΩ resistor in parallel with a
10pF capacitor.
Between conversions, the buffer input is connected to AIN
through the input resistance. When a conversion starts,
the buffer input is disconnected from AIN, thus sampling
the input. At the end of the conversion, the buffer input
is reconnected to AIN, and the hold capacitor tracks the
input voltage.
The T/H is in its tracking mode whenever a conversion is
not in progress. Hold mode starts approximately 10ns after
a conversion is initiated (aperture delay). The variation in
this delay from one conversion to the next (aperture jitter)
is typically 30ps. Figures 7–9 detail the track/hold mode
and interface timing for the three different interface modes.
lntemal Reference
The MAX121 -5.00V buried-zener reference biases the
internal DAC. The reference output is available at the
V
REF
pin and must be bypassed to the AGND pin with a
0.1µF ceramic capacitor in parallel with a 22µF or greater
electrolytic capacitor. The electrolytic capacitor’s equiva-
lent series resistance (ESR) must be 100mΩ or less to
properly compensate the reference output buffer. Sanyo’s
organic semiconductor capacitors work well; telephone
and FAX numbers are provided below.
Sanyo Video Components (USA)
Phone: [phone]
FAX: [phone]
Sanyo Electric Company, LTD. (Japan)
Phone: [phone]
FAX: [phone]
Sanyo Fisher Vertriebs GmbH (Germany)
Phone: [phone], ext. 44
FAX: [phone]
Figure 1. MAX121 in the Simplest Operational Mode
(Continuous-Conversion Mode)
Figure 2. Equivalent Input Circuit
AIN
V
REF
CONVST
V
SS
V
DD
CS
CLKIN
MODE
INVFRM
DGND
AGND
TO
SERIAL
PORT
DGND
DGND
10µF
10µF
22µF
0.1µF
0.1µF
0.1µF
AGND
AGND
AGND
DGND
-12V/-15V
+5V
ANALOG
INPUT
V
DD
CLOCK
INPUT
INVCLK SDATA
FSTRT
SCLK
MAX121
DAC
SAR
AIN
V
REF
V
REF
(-5V)
C
PACKAGE
10pF
C
SWITCH
2pF
C
HOLD
7pF
SAMPLING
COMPARATOR
3kΩ
3kΩ
HOLD
TRACK
BUFFER
MAX121 308ksps ADC with DSP Interface and 78dB SINAD
www.maximintegrated.com
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