Datasheet
PIN
NAME FUNCTION
PDIP/SO
SSOP
1
1
V
SS
Negative Power Supply, -12V or -15V. Bypass to AGND with 10µF and 0.1µF capacitors.
2 2 V
DD
Positive Power Supply, +5V. Bypass to AGND with 10µF and 0.1µF capacitors.
3 3 AIN Sampling Analog Input, ±5V Bipolar Input Range
4 4 V
REF
-5V Reference Output. Bypass to AGND with 22µF || 0.1µF capacitors.
5 7 AGND Analog Ground
6 8 INVCLK Invert Serial Clock. Connect to DGND to invert the SCLK output (relative to CLKIN).
7 9 INVFRM
Invert Serial Frame. This input sets the polarity of the SFRM output as follows:
If INVFRM = DGND, SFRM is high during a conversion.
If INVFRM = V
DD
, SFRM is low during a conversion.
8 10 DGND Digital Ground
9 11 SFRM
Serial Frame Output. Normally high (INVFRM = V
DD
), falls at the beginning of the
conversion and rises at the end (after 16 t
CLK
) signaling the end of a 16-bit frame.
10 12 FSTRT
Frame Start Output. High pulse that lasts one clock cycle, falling edge indicates that a valid
MSB is available.
11 13 SDATA Serial Data Output. MSB rst, two’s-complement binary output code.
12 14 SCLK
Serial Clock Output. Same polarity as CLKIN if INVCLK = V
DD
, inverted CLKIN if
INVCLK = DGND. Note that SCLK runs whenever CLKIN is active.
13 17 CONVST Active-Low Convert Start Input. Conversions are initiated on falling edges.
14 18 CLKIN
Clock Input. Supply at TTL-/CMOS-compatible clock from 0.1MHz to 5.5MHz, 40% to 60%
duty cycle.
15 19 CS
Active-Low Chip Select Input. CS = DGND enables the three-state outputs. Also, if
CONVST is low, initiates a conversion on the falling edge of CS.
16 20 MODE
Hardwire to set operational mode. V
DD
(single conversions),
DGND (continuous conversions).
— 5, 6, 15, 16
N.C. No Connection. Not internally connected.
AIN
V
REF
CONVST
1
2
16
15
V
SS
V
DD
CS
CLKIN
MODE
PDIP/SO
TOP VIEW
3
4
14
13
INVFRM
DGND SFRM
5
6
12
11
AGND
INVCLK SDATA
FSTRT
SCLK
7
8
10
9
MAX121
+
20
19
18
17
16
15
13
1
2
3
4
5
6
8
MODE
CS
CLKIN
CONVST
V
REF
AIN
V
DD
V
SS
N.C.
N.C.
SDATA
INVCLK
N.C.
14
7
SCLK
AGND
11
10
SFRM
DGND
12
9
FSTRT
INVFRM
N.C.
SSOP
+
MAX121
MAX121 308ksps ADC with DSP Interface and 78dB SINAD
www.maximintegrated.com
Maxim Integrated
│
5
Pin Description
Pin Congurations