Datasheet

The board layout should ensure that digital and analog
signal lines are kept separate, as much as possible. Take
care not to run analog and digital (especially clock) lines
parallel to one another.
The high-speed comparator in the ADC is sensitive to
high-frequency noise in the V
DD
and V
SS
power sup-
plies. Bypass these supplies to the analog-ground plane
with 0.1µF and 10µF bypass capacitors. Keep capacitor
leads at a minimum length for best supply-noise rejection.
If the +5V power supply is very noisy, a 5Ω resistor can
be connected, as shown in Figure 26, to filter this noise.
Figure 27 shows the negative power-supply (V
SS
) rejec-
tion vs. frequency. Figure 28 shows the positive power -
supply (V
DD
) rejection vs. frequency, with and without the
optional 5Ω resistor.
Dynamic Performance
High-speed sampling capability and 308kHz throughput
make the MAX121 ideal for wideband signal processing.
To support these and other related applications, FFT (Fast
Fourier Transform) test techniques are used to guarantee
the ADC’s dynamic frequency response, distortion, and
noise at the rated throughput. Specifically, this involves
applying a low-distortion sinewave to the ADC input and
recording the digital conversion results for a specified
time. The data is then analyzed using an FFT algorithm,
which determines its spectral content. Conversion errors
are then seen as spectral elements outside of the funda-
mental input frequency.
ADCs have traditionally been evaluated by specifications
such as Zero and Full-Scale Error, Integral Nonlinearity
(INL), and Differential Nonlinearity (DNL). Such param-
eters are widely accepted for specifying performance
with DC and slowly varying signals, but are less useful in
signal processing applications where the ADC’s impact
on the system transfer function is the main concern. The
significance of various DC errors does not translate well
to the dynamic case, so different tests are required.
Signal-to-Noise Ratio and
Effective Number of Bits
The signal-to-noise plus distortion ratio (SINAD) is the
ratio of the fundamental input frequency’s RMS amplitude
to the RMS amplitude of all other ADC output signals. The
output band is limited to frequencies above DC and below
one-half the ADC sample (conversion) rate.
The theoretical minimum ADC noise is caused by quanti-
zation error and is a direct result of the ADC’s resolution:
SINAD = (6.02N + 1.76)dB, where N is the number of bits
of resolution. A perfect 14-bit ADC can, therefore, do no
better than 86dB. An FFT plot of the output shows the
output level in various spectral bands. Figure 29 shows
the result of sampling a pure 50kHz sinusoid at a 300kHz
rate with the MAX121.
By transposing the equation that converts resolution to
SINAD, the user can, from the measured SINAD, deter-
mine the effective resolution (effective number of bits)
that the ADC provides: N = (SINAD - 1.76)/6.02. Figure
30 shows the effective number of bits as a function of the
input frequency for the MAX121.
Figure 22. TMS320 Simple Serial-lnterface Circuit
XF
CONVST
TMS320
MAX121
CLKR SCLK
DR
FSR
SDATA
FSTRT
CS
INVFRM
INVCLK
DGND
+5V
MAX121 308ksps ADC with DSP Interface and 78dB SINAD
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