Datasheet
Figure 12a. Timing Diagram for Power-Down Modes, External Clock
Table 5. Typical Power-Up Delay Times
Table 6. Software Shutdown
and Clock Mode
Table 7. Hard-Wired Shutdown
and Compensation Mode
REFERENCE
BUFFER
REFERENCE-BUFFER
COMPENSATION MODE
REF
CAPACITOR
(µF)
POWER-DOWN
MODE
POWER-UP
DELAY
(µs)
MAXIMUM
SAMPLING RATE
(ksps)
Enabled Internal — Fast 5 26
Enabled Internal — Full 300 26
Enabled External 4.7 Fast/Full See Figure 14c 133
Disabled — — Fast 2 133
Disabled — — Full 2 133
PD1 PD0 DEVICE MODE
0 0 Full power-down mode
0 1 Fast power-down mode
1 0 Internal clock mode
1 1 External clock mode
SHDN
STATE
DEVICE
MODE
REFERENCE-BUFFER
COMPENSATION
V
DD
Enabled Internal compensation
Unconnected Enabled External compensation
GND
Full
power-down
N/A
POWERED UP
FULL
POWER-
DOWN
POWERED
UP
POWERED UP
DATA VALID
(12 DATA BITS)
DATA VALID
(12 DATA BITS)
DATA
INVALID
EXTERNAL
EXTERNAL
INTERNAL
S X
X X X X
1 1 S 0 1
X XXXX X X X X X
S 1 1
FAST
POWER-DOWN
MODE
DOUT
DIN
CLOCK
MODE
SHDN
SETS EXTERNAL
CLOCK MODE
SETS EXTERNAL
CLOCK MODE
SETS FAST
POWER-DOWN
MODE
MAX1202/MAX1203 5V, 8-Channel, Serial, 12-Bit ADCs
with 3V Digital Interface
www.maximintegrated.com
Maxim Integrated
│
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