Datasheet
Table 2. Control-Byte Format
Table 3. Channel Selection in Single-Ended Mode (SGL/DIF = 1)
Table 4. Channel Selection in Differential Mode (SGL/DIF = 0)
SEL2 SEL1 SEL0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 GND
0 0 0 + -
1 0 0 + -
0 0 1 + -
1 0 1 + -
0 1 0 + -
1 1 0 + -
0 1 1 + -
1 1 1 + -
SEL2 SEL1 SEL0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7
0 0 0 + -
0 0 1 + -
0 1 0 + -
0 1 1 + -
1 0 0 - +
1 0 1 - +
1 1 0 - +
1 1 1 - +
BIT 7
(MSB)
BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT1 BIT 0 (LSB)
START SEL 2 SEL 1 SEL 0 UNI/BIP SGL/DIF PD1 PD0
BIT NAME DESCRIPTION
7 (MSB) START The rst logic 1 bit after CS goes low denes the beginning of the control byte.
6
5
4
SEL2
SEL1
SEL0
These three bits select which of the eight channels is used for the conversion
(Tables 3 and 4).
3 UNI/BIP
1 = unipolar, 0 = bipolar. Selects unipolar or bipolar conversion mode. In unipolar mode, an
analog
input signal from 0 to V
REF
can be converted; in bipolar mode, the signal can range
from -V
REF
/2
to +V
REF
/2.
2 SGL/DIF
1 = single ended, 0 = differential. Selects single-ended or differential conversions. In single-ended
mode, input signal voltages are referred to GND. In differential mode, the voltage difference
between two channels is measured. (Tables 3 and 4).
1
0 (LSB)
PD1
PD0
Selects clock and power-down modes.
PD1 PD0 Mode
0 0 Full power-down (I
DD
= 2µA, internal reference)
0 1 Fast power-down (I
DD
= 30µA, internal reference)
1 0 Internal clock mode
1 1 External clock mode
MAX1202/MAX1203 5V, 8-Channel, Serial, 12-Bit ADCs
with 3V Digital Interface
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