Datasheet

MAX11618–MAX11621/MAX11624/MAX11625
10-Bit, 300ksps ADCs
with FIFO and Internal Reference
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Table 3. Setup Register*
BIT NAME BIT FUNCTION
— 7 (MSB) Set to zero to select setup register.
— 6 Set to 1 to select setup register.
CKSEL1 5 Clock mode and CNVST configuration. Resets to 1 at power-up.
CKSEL0 4 Clock mode and CNVST configuration.
REFSEL1 3 Reference mode configuration.
REFSEL0 2 Reference mode configuration.
— 1 Don’t care.
— 0 (LSB) Don’t care.
CKSEL1 CKSEL0 CONVERSION CLOCK ACQUISITION/SAMPLING CNVST CONFIGURATION
0 0 Internal Internally timed
CNVST
0 1 Internal Externally timed through CNVST CNVST
1 0 Internal Internally timed AIN15/AIN11/AIN7**
1 1 External (4.8MHz max) Externally timed through SCLK AIN15/AIN11/AIN7**
REFSEL1 REFSEL0 VOLTAGE REFERENCE AutoShutdown
0 0 Internal
Reference off after scan; need
wake-up delay.
0 1 External single ended Reference off; no wake-up delay.
1 0 Internal
Reference always on; no wake-up
delay.
1 1 Reserved Reserved. Do not use.
* See below for bit details.
** For the MAX11618/MAX11619, CNVST has its own dedicated pin.