Datasheet

t
HD.STA
t
SU.DAT
t
HIGH
t
R
t
F
t
HD.DAT
t
HD.STA
S
Sr
A
SCL
SDA
t
SU.STA
t
LOW
t
BUF
t
SU.STO
PS
t
HD.STA
t
SU.DAT
t
HIGH
t
FCL
t
HD.DAT
t
HD.STA
S Sr A
SCL
SDA
t
SU.STA
t
LOW
t
BUF
t
SU.STO
S
t
RCL
t
RCL1
HS MODE F/S MODE
A. F/S-MODE 2-WIRE SERIAL-INTERFACE TIMING
B. HS-MODE 2-WIRE SERIAL-INTERFACE TIMING
t
FDA
t
RDA
t
t
R
t
F
P
Figure 1. 2-Wire Serial-Interface Timing
MAX11612–MAX11617
Low-Power, 4-/8-/12-Channel, I
2
C,
12-Bit ADCs in Ultra-Small Packages
9
Maxim Integrated