Datasheet

MAX11606–MAX11611
Low-Power, 4-/8-/12-Channel, I
2
C,
10-Bit ADCs in Ultra-Small Packages
8
Maxim Integrated
Pin Description
PIN
MAX11606
MAX11607
MAX11607
MAX11608
MAX11609
MAX11610
MAX11611
µMAX WLP QSOP
NAME FUNCTION
1, 2, 3 A1, A2, A3 5, 6, 7 5, 6, 7 AIN0, AIN1, AIN2
— — 8–12 8–12 AIN3–AIN7
— — — 4, 3, 2 AIN8, AIN9, AIN10
Analog Inputs
4 A4 — — AIN3/REF
Analog Input 3/Reference Input or Output. Selected in
the setup register (see Tables 1 and 6).
— — 1 — REF
Reference Input or Output. Selected in the setup
register (see Tables 1 and 6).
— — — 1 AIN11/REF
Analog Input 11/Reference Input or Output. Selected in
the setup register (see Tables 1 and 6).
5 C4 13 13 SCL Clock Input
6 C3 14 14 SDA Data Input/Output
7 B1–B4, C2 15 15 GND Ground
8C1 16 16 V
DD
Positive Supply. Bypass to GND with a 0.1_F capacitor.
— — 2, 3, 4 — N.C. No Connection. Not internally connected.
t
HD:STA
t
SU:DAT
t
HIGH
t
R
t
F
t
HD:DAT
t
HD:STA
S
Sr
A
SCL
SDA
t
SU:STA
t
LOW
t
BUF
t
SU:STO
PS
t
HD:STA
t
SU:DAT
t
HIGH
t
FCL
t
HD:DAT
t
HD:STA
S Sr A
SCL
SDA
t
SU:STA
t
LOW
t
BUF
t
SU:STO
S
t
RCL
t
RCL1
HS MODE F/S MODE
A. F/S-MODE 2-WIRE SERIAL-INTERFACE TIMING
B. HS-MODE 2-WIRE SERIAL-INTERFACE TIMING
t
FDA
t
RDA
t
t
R
t
F
P
Figure 1. 2-Wire Serial-Interface Timing