Datasheet

MAX1142/MAX1143
14-Bit ADC, 200ksps, +5V Single-Supply
with Reference
12 ______________________________________________________________________________________
SCLK
DOUT
A/D
STATE
DIN
SSTRB
CS
41 8 19
START
M1 M0
P2 P1 P0
UNI/
BIP
INT/
EXT
15
21 32
B2B12
B13
MSB
B11 B1 X X
B0
LSB
FILLED WITH
ZEROS
t
ACQ
ACQUISITION CONVERSIONIDLE IDLE
Figure 3. Long Acquisition Mode (32-Clock Cycles) External Clock, Bipolar Mode
SCLK
DOUT
DIN
SSTRB
CS
41 8
START
M1 M0
P2 P1 P0
UNI/
BIP
INT/
EXT
9
2110 24
B2B12 B11
B13
MSB
B1 X X
B0
LSB
FILLED WITH
ZEROS
t
ACQ
t
CONV
Figure 4. Internal Clock Mode Timing, Short Acquisition, Bipolar Mode
PO CLOCKED IN
t
SSTRB
t
CONV
t
SCK
t
CSS
SSTRB
SCLK
NOTE: FOR BEST NOISE PERFORMANCE, KEEP SCLK LOW DURING CONVERSION.
t
CSH
CS
Figure 5. Internal Clock Mode SSTRB Detailed Timing