Datasheet

MAX1132/MAX1133
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
10 ______________________________________________________________________________________
Table 1. Control Byte Format
BIT NAME DESCRIPTION
7 (MSB) START The first logic “1” bit, after CS goes low, defines the beginning of the Control Byte
6 UNI/BIP
1 = unipolar, 0 = bipolar. Selects unipolar or bipolar conversion mode. In unipolar mode, analog
input signals from 0 to +12V (MAX1132) or 0 to V
REF
(MAX1133) can be converted. In bipolar
mode analog input signals from -12V to +12V (MAX1132) or -V
REF
to +V
REF
(MAX1133) can be
converted.
5 INT/EXT Selects the internal or external conversion clock. 1 = Internal, 0 = External.
4M1
M1 M0 MODE
0 0 24 External clocks per conversion (short acquisition mode)
0 1 Start Calibration. Starts internal calibration.
1 0 Software power-down mode
3M0
1 1 32 External clocks per conversion (long acquisition mode)
2
1
0(LSB)
P2
P1
P0
These three bits are stored in a port register and output to pins P2, P1, P0 for use in addressing
a mux or PGA. These three bits are updated in the port register simultaneously when a new
Control Byte is written.
Table 2. User-Programmable Outputs
OUTPUT
PIN
PROGRAMMED
THROUGH
CONTROL BYTE
POWER-ON
OR RST
DEFAULT
DESCRIPTION
P2 Bit 2 0
P1 Bit 1 0
P0 Bit 0 0
U ser - p r og r am m ab l e outp uts fol l ow the state of the C ontr ol Byte’ s thr ee LS Bs
and ar e up d ated si m ul taneousl y w hen a new C ontr ol Byte i s w r i tten. O utp uts
ar e p ush- p ul l . In har d w ar e and softw ar e shutd ow n, these outp uts ar e
unchang ed and r em ai n l ow - i m p ed ance.
ACQUISITION CONVERSIONIDLE IDLE
SCLK
DOUT
A/D
STATE
DIN
SSTRB
CS
41812
START
M1 M0
P2 P1 P0
UNI/
BIP
INT/
EXT
15
21 24
B12 B11B14 B13 B10 B9 B4
B15
MSB
B0
LSB
FILLED WITH
ZEROS
B2B3 B1
t
ACQ
Figure 2. Short Acquisition Mode (24-Clock Cycles) External Clock, Bipolar Mode