Datasheet

18Maxim Integrated
MAX11321–MAX11328
1Msps, 10-/12-Bit, 4-/8-/16-Channel ADCs with
Post-Mux External Signal Conditioning Access
Figure 7. Internal Conversions with SWCNV
Figure 6. Internal Conversions with CNVST
CS
EOC
SCLK
DIN
DOUT
INTERNAL OSCILLATOR ONMODE CONTROL
SET MODE REG
READ DATA FROM FIFO
SET MODE REG
UP TO N INTERNALLY
CLOCKED ACQUISITIONS
AND CONVERSIONS
SWCNV = 1
t
CNV_INT
(N = 1)
1 117 16
SCAN OPERATION AND
RESULTS STORED IN FIFO
INTERNAL
OSCILLATOR ON READ DATA FROM FIFO
SET MODE REG
READ DATA FROM FIFO
SET MODE REG
CNVST
CS
1 1
EOC
SCLK
DIN
DOUT
UP TO N INTERNALLY
CLOCKED ACQUISITIONS
AND CONVERSIONS
t
CSW
16 16
SCAN OPERATION AND
RESULTS STORED IN FIFO
t
CNV_INT